ASML Holding N.V. (ASML) Earnings Call Transcript & Summary

Welcome, everyone, to ASML's 2021 Investor Day. I am Skip Miller, Head of Investor Relations at ASML. Thank you all for joining us today. Before I go over the presentation and the agenda of the day, I'd like to first do a little -- cover logistics regarding, first, the Q&A. There is a Q&A session after all the presentations and to submit questions, you'll see a Ask a Question, at the bottom of the screen, button. Please select that, and you can submit your question. We'll collect those throughout the presentations today. You do not need to put your name and company, but if you would like us to contact you should we not get to your question, please include your contact information. Secondly, we do like to continue to improve these events and make them as valuable as possible for you. So if you look on the right side of your screen, you'll see a feedback button. Please fill that out, and we appreciate feedback. That definitely helps us make improvements in these events. Now if you go to the agenda, we'll start the agenda off with Peter Wennink. He will talk about the company's strategy and shareholder value. Martin Van den Brink will then come about -- then talk about the industry road map and the technology strategy. Next, we'll have Christophe Fouquet to come in and talk about EUV products and the business opportunity. We will then take a break. We have 10-minute breaks in here, 2 of them during the presentations and 1 before Q&A. And then we'll -- next will be Jim Koonmen talk about applications, followed by Ron Kool on deep UV. Wayne Allan will talk about our installed base opportunity. And lastly, Roger Dassen will talk about our business model and the capital allocation strategy. Peter will then wrap it up, which should be around 5:00 p.m. CET. We'll have a break and then move to the Q&A session. Before we begin, I would need to remind everyone that comments -- you might want to read all this. The comments -- reminder, when the comments made by management during this event will include forward-looking statements within the meaning of the federal securities laws. These forward-looking statements involve material risks and uncertainties. For a discussion of risk factors, I encourage you to review the safe harbor statement contained in today's press release and presentations, which will be posted on our website at asml.com. Now despite our best efforts, unfortunately, we could not have you all join us here today as you would be able to see the major changes that have taken place over the past couple of years. Before Peter starts his presentation, we will show you a video of the Veldhoven campus so you can see some of the changes and expansion under way as we prepare for future growth. [Presentation]

Good morning, good afternoon, good evening, good night to all of you. I don't know where you are, but in any case, many thanks for taking the time to listen to us. I'm going to talk about company strategy and some of the value drivers. And just to recap very quickly, the reason why we showed that video is actually to show you that we're preparing for growth. And I think this will be probably the big theme throughout this presentation not only mine but also of my colleagues that it is about growth because there's some mega trends happening, and I will talk about that. But it actually means that this industry will grow, and we are prepared. We're not only prepared in square footage or square meters, whatever you want, but also for people. This is a war on talent. We currently employ about 31,000 people and will grow, as I will mention later. On top of the fact that we have these mega trends, there are things happening in the geopolitical space whereby countries are looking for technological sovereignty, but all it will translate into more demand for wafers. And that means that customers will invest in wafer capacity. It will also mean that technology push will continue. So lithography intensity we think will grow, and that's also logical. As we all know, we introduced EUV and has hit high-volume manufacturing last year. So all in all, after that, we will of course deliver growth and increase stakeholder value, shareholder value but definitely also ESG value because we do believe that ESG has become and will become an integral part of our strategy. So let me start. I will first talk about the end-market demand the way we see it, but not only we see it but it's also based on what we discuss with customers, what customers say and what industry analysts say. And I'll talk to litho market, our strategy and about sustainability. Okay. I always like to use slides of customers, and this is an Intel slide because it actually reflects how they think about the world. And we actually depend on the views that our customers have, and it's very much in line with how we see the world. We have the cloud, 5G infrastructure, artificial intelligence and then the edge, the edge computing. And I'll come to that on the next slide. And of course, the virtual and the augmented realities and the gaming. And I think the next slide, this one, I really like. It's a bit busy. It's from Qualcomm. And what it actually shows is actually how we think about the world. Now we have the cloud, which increasingly -- also we as a company are actually using the cloud more and more as a cost-effective way to store data and to conduct business. And then we, of course, have the right-hand side, which actually you can see is a significant network of solutions, and I call it distributed computing solutions -- distributed storage solutions. And now when you look at the icons, you see smart traffic systems. You see surveillance systems, cameras, automotive, self-driving cars. You see consumer personal appliances. You see industrial appliances, robotics, the infrastructure, the -- I would say, the energy infrastructure needs to be upgraded. And of course, it basically evolves around the smartphone. And in between, you see 5G. And 5G is this big pipe that actually helps us to basically transfer all the data back and forth into the cloud. And what is the significance of the right-hand part is that many of these applications are mobile and are driven by sensor technology, and the sensor technology picking up the analog data needs to be turned into digital. But because it's mobile, we need power. We need sensors like image sensors. We need microcontrollers. And the significance of that is that it doesn't need all 7-nanometer. On the contrary, you want to keep the computing very close to the sensors and that means that the computing is really the distributed computing -- a lot of the distributed computing is about mature technology and that's what we're seeing today. This explosion of tens of thousands of companies trying to create new services, new products creates the demand for mature technology. 28-nanometer is still advanced, but 45-, 65-nanometer, 90, 180 and even i-Line, everything is in significant demand today and it will keep going. This will grow further because if we think about the enabler, 5G being able to capture it and to transfer it to the cloud, and we think about 5G, then we've just started. We think by 2026, global 5G subscriptions will be $3.5 billion, and we'll then need an investment of approximately $150 billion. But it will grow further, and by 2030, this will have grown to $250 billion. So we're just beginning and that means that when we look at this decade and also we look at this distributing computing drive that the need for solutions, advanced solutions and mature solutions and storage and a performance memory, we'll just keep growing. We've just begun. Now, when we go to data like -- it's always interesting when you look at the size of what we can expect. Today, estimated 40 billion connected devices, which by the way, when we were in 2018, we actually estimated that to be 25 billion. Now we think by 2021 today, it is 40 billion. And with the growth rates that we're currently looking at, is going to be 350 billion devices connected, which will create massive amounts of storage and it is needed. Now why do I think this is an important slide, and I show this slide more often. Actually, when there's such a significant demand from the outside for growth in the areas I just mentioned, then we have an ecosystem that actually starts with us, semiconductor manufacturers, that actually -- we sell to the semiconductor makers and they sell to the hardware makers and they sell to the platform companies to big tech. When you look at the earnings power of that ecosystem, it was last year close to USD 500 billion, with a growth rate of, over the last 5 years, about 14%. There is no reason because of what I just said on the previous slides that there is any reason why that would go down, this will continue. And this ecosystem with that earnings power have very strong incentives versus going to be a lot of competition, and it will drive innovation. And this innovation will also be driven by these big societal issues that we have. The big societal challenges face massive problems and innovation needs problems. There is no innovation without problems. If you have no problem, why would you innovate? So the bigger the problems, as these ones are, significant when you think about the energy transition, when you think about the digitalization happening everywhere, we need solutions. The industry is able to do that and the earnings power is there. Now on top of this, and I mentioned this before, we have this drive for technological sovereignty. This is just a snippet of the headlines. But if you translate that -- sorry for that, if you translate this into specific programs that governments have actually announced and you add it all up, you take the U.S. with 52 billion, you take the EU that hasn't been specific, but they basically said we expect private and public investments in the semiconductor industry to be anywhere between EUR 24 billion and EUR 35 billion. Let's take half. That's another EUR 15 billion. China has announced EUR 80 billion, although that we have Japan and Korea also adding to this. So if you add it up, there is annual CapEx that we're looking at EUR 150 billion for the industry. There are governments that are saying we will make available another EUR 150 billion. Now adding these 2 up. It's clear that people start talking about what will this lead to? Does it lead to overcapacity? Cyclicality? And yes, we do agree that potential is there, but we also need to realize 2 things: One is that this industry, our industry, we and our customers have structurally underestimated the capacity of the industry needed to support all those innovations. Everybody knows where we are today. We have a structural undercapacity in the semiconductor industry. So we're bad at assessing the growth rates. Not bad because we think it's too high, I think we structurally are bad because it's too low. But okay, we will also use this, what we know today, as the basis of what we're going to tell you in the rest of these presentations. On top of that, you can expect that the expansions which will happen geographically will not be done by dozens of companies. There's only going to be a few companies and what they are going to do is our very large customers. And now how you look at it, they're going to be rational. And yes, market shares are still up for grabs, but over time, it will become clear who will win and who will not win, and there will be adjustments. So I'm positive. I'm positive on the fact that there is enough capital. There is a drive. There is a political drive. There is an industry drive to grow, and this will help. And yes, we will probably have some cyclicality because it's not going to be concentrated in only a few geographical areas, it's going to be spread around the globe. It's going to help us as an equipment industry, I agree with that. That is my conviction, it will be controlled. Now when we look at the semi end markets and we just look at the growth rates over the last 10 years and we extrapolate to 2025, this industry goes about -- our customers grow about 7% CAGR. Now that's spread over, let's say, 7 key segments, which starts with the smartphone between 6% and 7% CAGR. Now when we go back to 2018, there was a different number, it was lower. But yes, the rollout of 5G and everything that's happening in distributed computing is not strange that it will actually grow faster, which is also true for consumer electronics and for personal computing, which if I remember well, in 2018, it was flat or even minus. Then this will have its effect on the wireless infrastructure and on service and data center and on storage. But the 2 double-digit growth areas are automotive, which is very clear with the electrification, the advanced driver assisted systems and also industrial electronics. We see it. We see our over-the-shoulder support that we need to provide to our customers. It's all digital. Now of course, the 2 big items here are the data centers and the service, estimated to be close to EUR 190 billion by 2030 and the smartphone market, around EUR 210 billion. These are the 2 big markets, but the growth, the double-digit growth areas are automotive and industrial, and we believe so. And we also see no reason why this CAGR of 7% shouldn't continue, which if you then do the calculations, we come very close to the $1 trillion that has been mentioned several times in some industry analyst reports. Now what does that mean in terms of wafer demand. For logic and MPU, the advanced nodes, that's the lower than 28-nanometer, it's almost a 10% CAGR from 2020 to 2025. DRAM about 5.2, and NAND close to 6. And then if you then look at the wafer capacity growth, we believe that between 2020 and 2025, the wafer starts per month growth will be about 500,000, which compounds to a CAGR of more than 5%. And it's split, as you can see here, in NAND, DRAM, advanced logic and mature. And it's about 100,000 wafer starts for NAND, about 80,000 wafer starts per month for DRAM and about 125,000 for advanced logic. But I look at mature, 20,000 wafer starts. And that goes back to what I said earlier when I talked about distributed computing. And of course, the CAGR is lower. It's close to 4%. But the size, as you can see in the graph, is significant. And that's a big change as compared to 2018. Okay. What about the lithography market? Well, it translates into this. On the left-hand side of this graph, you can see when you look at the estimate that we had in 2018 for the growth rates. 2017 to 2025, we thought the semi end markets would have a growth rate of about 4.9%. Now that's 10% higher. It's about 5.4% now. That's what we think today, which also has an effect on the semi CapEx because we need more wafers. I think it's clear from what I said before, and when you add the, let's say, the underlying structural secular growth of the industry on top of what we believe is going to be a drive for technological sovereignty, the semi CapEx will not be 3.5%, it will be closer to 6%. And also has an effect on litho CapEx because litho CapEx will then grow because litho intensity will increase. And of course, with the introduction of EUV and the focus on advanced nodes, as you could see on the previous slide, almost a 10% CAGR, is not strange that also litho intensity and the litho CapEx will be bigger. And it's not something that we've dreamt up. I mean this is the data that we have collected from WSTS, from Gartner, from VLSI SEMI. But this is what the market seems to believe, and we believe it, too. Now what does that mean? It means that when we look at the distribution of our technology by 2025, about 67%, 68% will be EUV and the rest will be immersion and dry and metrology and inspection. Now this 67% is less than we said. It's a lower percentage than what we said in 2018 on 2025. It doesn't mean that the EUV market has shrunk, no. As a matter of fact, it has grown, but the emerging market and the dry market all the reasons that I mentioned has grown even faster, which is good because it actually means that our litho market will be bigger in 2025 than we initially thought, and Roger is going to talk about that. Now what does that mean? If we need to ship all those machines to make sure that we can supply our customers with enough wafer capacity, we need to do something. We need to add capacity, both in deep UV and in EUV. Now in the end, we sell machines, we sell units, but what our customers are buying is wafer capacity. So when you look at deep UV, we think we will increase wafer capacity between 2020 and 2025 and deep UV with a factor of 2, which means 50% more units. Last year, we did close to 250 units, 50% on top of that around 2 -- 375. And in EUV, we're going to double number of units. So 2020, we had about 35 units. Double, about 70 units for 2025. But also, we will increase the productivity. In deep UV, we will bring our dry products and Ron will talk about this, to a more productive platform from XT to NXT. In EUV, and Christophe will talk about that, you will see in the roadmap several versions of the EUV products that will have higher productivity. Now there are a couple of drivers. First of all, we need to build fast and have the cycle time reduction. We are currently planning between now and 2025 a 35% reduction of cycle time. In deep UV, another 10%. We are already pretty fast. I mean we can make a KrF XT tool in 5 weeks here in Veldhoven. So -- but there's still some room for improvement. Now of course, there are more people. We need more people. We had 20% growth in our people to support the 2025 operations and expansion of capacity. We need to also increase the production space, not only with us, more important, in the supply chain. For us, I think we can stay within the square meters or square footage that we have. We have a new logistics center, as you saw in the video, so we can use the current logistics center to build more cabins. Basically, put in the same square meters, we're just going to expand our production capacity. And of course, the productivity of the machines between 25% and 60% higher productivity, which of course translates into value of our tools. Now just to wrap up on this part. This is a VLSI research slide, which they've published not so long ago. And actually, it shows a potential for the semiconductor industry to grow to $1 trillion. And for the WFE, the Wafer Fab Equipment, to grow to $150 billion. Now if you look at the growth rate and if you just extrapolate the growth rates that we just saw, we come to very similar numbers. Okay, that's on the lithography market. And like I said, Ron and Christophe, Jim, but also Wayne are going to go into more detail on the deep UV market, the metrology and inspection market, EUV market and our installed base business. On the strategy. Let's go back to 2018. In 2018, we had 4 key elements. We said we need to concentrate on holistic litho expansion, which are basically driven by -- leadership in what we call in-device metrology, basically focused on the correction of issues that we see in overlay and the Pattern Fidelity Control, which combines e-beam metrology and the other metrology solutions that we have. Now what did we do? We delivered a new suite of YieldStar products and our e-beam products, the EP5 products. And we focus that on extending EPE control, that's the edge placement error control. We delivered the first multi-beam tool, and we'll see that what we are now seeing for 2021 in our strategy. We will continue doing that. On deep UV, clearly, we had to continue in innovation, but very important for our customers, these are mature products. We have to drive cost down, improve uptime and also make sure that our installed base business will be expanded because our installed base will grow, and we need to expand that installed base with decent profitability. So what did we do? We introduced NXT:2000 and a 2050 in volume manufacturing. We actually brought our first dry deep UV product on to the NXT high-performance platform. Ron is going to talk about that. On top of that, we are at record numbers for uptime and our quality performance keeps going up. On EUV, the focus was on EUV and industrialization, make EUV HVM. So we did. We pulled in 3400C and 3600D. And we introduced it in both logic and in DRAM, and we started to execute on our new service model. And with High-NA, we have to enable High-NA for the then 3-nanometer logic node, and Christophe will give an update there. And the facilities are in place. It's all in the video and the first modules are in preparation. What are we going to do now? First of all, on top of these 4 items, we have to strengthen the customer trust. It is absolutely essential as you see it today that our customers completely rely on our execution capabilities. Now if you would call up a customer today and say, are you satisfied, he'd say no, because we cannot get enough machines. So we need to extend our capacity, drive down cost and make sure that we have very robust products. And we have to make ESG an integral part of our strategy. In holistic litho, we have to build a leading position in edge placement error, which is basically the culmination of YieldStar and e-beam products to control and monitor the edge placement error. And on deep UV, keep doing what we are doing, extend the capability and the capacity, also the shipment capacity of our deep UV products, immersion and dry and move dry onto a high-performance platform, and that's the KrF platform, which is in very high demand now, moving to the high-performance platform. On EUV, we're in HVM. So we have to bring EUV as quickly as possible to the performance metrics that we have in the field at the customer for deep UV, which means we have to execute on the roadmap in terms of productivity, reliability and productivity increase. And on High-NA, we have to absolutely do what we set out to do and bring High-NA to HVM in 2025, and all the ingredients are there, and Christophe will talk about this. Now on sustainability. We have to go back. I think it's an important issue in the company for our stakeholders. I mean our people talk about it, our customers want it, our suppliers want it, our shareholders want it and our society, the community wants it. So I have to go back to our purpose. Our purpose is to unlock the potential of our people and society by pushing technology to the new limits and digital technology will help. It will book social progress, but also will help in energy efficiency and reduce the global emission by 15%. You can think about working from home. You can think about smart industry. You can think about agriculture, sensor technology. There's a whole list of areas where digital technology will help. And our vision is also to develop lithography tools that will help our customers to produce energy-efficient but very high-performance chips, which reduces the energy efficiency or increase the energy efficiency every 2 years with a factor of 3. And we think we can do that together with our customers. And also, we will help our customers to minimize materials and lower energy usage that is required to produce those advanced microchips, which means that we also need to look at the energy performance of our tools, which we will. And we will drive the -- our road map to 2025 to net zero, but also, we will collaborate with our suppliers to drive to net zero by 2030 and for our customer base, help them and collaborate to drive to net zero by 2040. So if we then look at our ESG strategy, we had 5 blocks until now. We have now 9. We actually extended with, I think, something which is important, an attractive workplace for all, which is also focused on diversity and inclusion. An innovative ecosystem, extremely important for us because we're a system engine. We're basically a system architect. We're a system integrator. We completely rely on an ecosystem where innovation is better is absolutely paramount. So you will also see us focusing on start-ups, scale-ups, but also on innovation in our current ecosystem, which we'll do together with the responsible supply chain, which we will actually hold to the same standards as we have. And I think we want to be more recognized as a valued partner for our community. That's the S in ESG. On E, on environment, we keep doing what we are doing now, but even put more effort behind energy efficiency and the climate action. I'm going to talk about that in a minute. And of course, the circular economy. We have to reduce waste. And it's even in our company, also in our company waste, which we can take out of the system. Now having said that, we think the G of governance is very important because when you think about these areas, environmental and social, where we put our focus, it is about integrated governance. We need to be part of our integrated strategy and that is for all stakeholders. It's for our people, it's for our shareholders, it's for our customers, suppliers and for the community, and we have to do that by being very transparent in our reporting. So that is extremely important that the sign-based target initiative that we will align to, and we will align to it and we have a target to do that by the end of the year. Having said that, now I quickly go to the climate actions. When we look at Scope 1 and 2, it's our manufacturing in our buildings. We have 0.015 megatons CO2 per year. That's a 2020 measurement. By 2025, we will be net zero. On business travel and commute, we have a target to be net zero by 2025, and we do that by reducing energy, just by basically using less energy, but also using green energy, and we will compensate the remainder. But the focus will be on 1 and 2. And what we had to reach the Net Zero, we will have the compensation of the emissions as part of the solution. And when we go to suppliers, by 2030 through supply chain collaboration, this is really about collaboration, we have a target that by 2030, we want to be net zero. I'm positive there. Many of our key suppliers are actually with us in Scope 1 and 2. So if everybody is with us in Scope 1 and 2, we'll be at Scope 3. And with our customers, we need further to collaborate to be net zero by 2040, which is also the desire of our customers, and you will see increased collaboration on that front. Now is that recognized? Yes, it's recognized currently by the rating agencies, but it's not enough for us. We want to be a top class when we presented these charts, and when you, for instance, look at the last row, CDP, yes, we have to improve there. That has to do with basically the analysis on the impact of climate change. We need to step up there. We will step up there. We will report on it. We are in areas where we haven't suffered from climate change effects, but we will improve there also. Now the key messages. And I'm going to repeat myself and hopefully, you will recognize this when we go through the presentations that are going to follow. The mega trends -- I hope I was clear. Mega trends are there. They will continue, and they will support our compound annual growth rates. Countries will also step up, and will support the growth of this industry because they're now finding out that semiconductors are as important, even more important than oil. And that translated into higher wafer demand into higher litho intensity for which we need to build capacity together with our supply chain, and that will -- and that means that we will provide value to our shareholders and to our stakeholders. And we'll integrate our ESG targets as an integral part of our strategy. That's my part. Thank you very much for your attention. I'd like to move over to Martin. Thank you.

Peter, thanks. I will focus on the technology strategy, both how Moore's Law is perceived to move forward in the coming decade as well how we respond to that in our technology. And I can summarize at start to state that Moore's Law is alive and well, fueled by system scaling, which then also means that semiconductor scale and contained path of our business, our customers in support of the never-ending need of data exchange. Our customer roadmaps require contained shrink, which we have to respond on edge placement and affordable scaling. We do this in a holistic way by not only driving the individual step up performance, but also the whole a little closer with holistic portfolio. And we align this with our customer roadmap, and we are preparing also moving forward to go to the next level of EUV we call High-NA. And we continue to execute all of this following our strategic priorities with an increased focus on cost effectively and sustainability. I'd like to start with the evolution of Moore's Law and our customer roadmap. And I start with a bit of a complicated pictorial, which is more or less showing the coming 10 years' device innovation as been depicted by IMAX. Where we are today on FinFET at the 3-nanometer node, we moved to nanosheets or gate all around, and we're going to various versions of the nanosheet going in the end to below nanometer to atomic channels. So this is to say that the device itself has a substantial movement of improvements moving forward. However, as been shown by Mark Liu earlier this year in his presentation, I copied the slide off him, the innovation is not limited to device level. You see here major innovations as labeled by the amount of transistors on a single system on chip level as well as system level. And I remember 3 years ago, I introduced with you what I call the 4 engines. And the 4 engines, you can also look at this picture. You can recognize the 4 engines. It's about device scaling, mainly done by foundry and the supply chain circuit scaling, which is mainly the foundry customers. And the foundry's dimensional scaling is the litho supply chain, including customers as well as architectural scaling, which is mainly done by foundry customer. You see here the orange dots is where we are actively mainly on chip level. Now if you go back in history and look to a more slow evolution, my starting point is around the mid '70s. You'll see here that the clock frequency of chips has been steadily increasing to around 2005, where the clock frequency stopped. When it comes to litho density, dimension of contact poly pitch times metal pitch and transistor density, goal has to continue to scale up to today and container scale the coming 10 years. However, since the clock frequency is scaling, we have to look to a different metric to show the performance progress of chips. Mark did his presentation by introducing the concept what we call energy-efficient performance, which is in fact the amount of operations per seconds developed by the energy per operation. And on a single device, it's about the clock frequency divided by the switch energy and using the Dennard scaling model, which was the scaling model -- which was used in our industry prior to 2005. You can say that if you scale the density, the [ with K ], your energy proficiency performance would scale [ with K ] to the power 4, which means if you have 2x for 2-year, density scaling -- the energy-efficient performance skilled ForEx for every 2 years. You see this listed on this slide. So you see a very aggressive improvement up to 2005, which is gradually slowing down, dominated by the stalling of the frequency and still increasing because of the dimensional scaling. However, as Mark showed in his presentation, he is not looking to dimensions. He is looking to what he called energy-efficient performance I just explained, which has been increased with a tempo of 3x for 2 years since 2005 to today. And moreover, he believes that this will continue to scale for the coming 20 years, which is a very, very strong prediction. And that is, in itself, a major fuel for the semiconductor moving forward in terms of pulling new applications and more calculation-intensive tasks. If I plot out the system graph in my plot, you see in this animation that I normalize this graph where the 2005 device scaling stops. And as you can see that system scaling took over since 2005. Mind you that it was 15 years ago. And we see the system scaling takes over and continue to go strongly to 2040. I did not have the guts like Mark, predicting what scaling will do for the coming 10 years. And I'd like to limit myself to say, for the coming 10 years, we'll see substantial scaling taking place. An example of scaling has been given recently by Lisa Su from AMD, which gives this 3D chiplet integrated package with 3x performance reduction and 4% to 25% speed reduction, which is overall giving you a 4x energy efficiency performance. If you now take this graph and translate what it could mean for ASML, I go back to this little density graph and reverse it. As you see here, I put it on a [ lock skill ], and here you see the logic metal pitch, which is the smallest pitch in logic. And I don't take also the edge placement error and the overlay as part of it and the node name as you see going down to 2013. As you see, that the edge placement resolution continues to go down. And you also see that the overlay, the OPC goes a bit more aggressive to allow more space for the other errors in our customer budgets. So all of our roadmap here has been highly based on this projection. Now as you appreciate, the previous story is very much focusing on the logic. On memory, however, I tap again to a slide of Seok-Hee Lee from Hynix, who give excellent presentation in March, who did make a prediction of DRAM to scale down below 10-nanometer in the coming 10 years. And for NAND, similar aggressive scaling. However, DRAM is more of a dimensional scaling and NAND, we're talking about layers. Where we today are at around a little -- a bit short of 200 layers is the most advanced nanochip. That will scale another 3x the coming year with all kind of consequence on the manufacturing infrastructure. That being said -- this is a key slide, we can project the amount of lithography layers by technology and logic, DRAM, NAND, you see that the color coat is in the various technology we're providing from i-Line krypton fluoride, dry systems, immersion systems and EUV. And you see that as we're progressing from the 5- to the 1-nanometer node, we see increasing use of EUV and increasing use of High-NA. For DRAM, this is kind of flat and for 3D NAND, we see little intensity goes up because you have to restart litho several times in the stack when you grow the number of layers. If you look from a bit of a distance, zooming out a bit, you see that the need for DUV is increasing on a per layer projection. It is not taking care of the volume part. And EUV layers are increasing, but over time, also subdued by introducing of High-NA will replace multiple EUV lays. This has been used later on with Roger and into the overall modeling of the business. That means for our semiconductor roadmap, I think we are very -- continue to be very bullish on the continuous decade where system scaling of our customers fuel the need of advanced semiconductor where the shrink being litho is an essential part of it, and that needs us to drive the litho performance at lower cost and higher productivity. And we need to continue to have a trusted relations with our customers with very strong holistic products. That being said, let's go to our strategic priorities. Peter already talked about, I will not elaborate on this, it's in fact the 4 business units, which are going to be talked later after me. And I put that also an overarching priority, which I call customer trust, where we need to be able to deliver performance at cost robust and also in a sustainable way, which I like to close, and I'd like to start with our holistic approach. If you look to our rich proposal, there's not much change on holistic diagram for the last, let's say, 15 years or so. But you see that the slide is slowly evolving, where you see on the top, we continue to be strong, and we aim to be strong in the litho equipment. On the left bottom, you see the computational part. On the right bottom, you see the metrology part. And you see the triangle is not only going to traditional litho problems like overlay and focus, but also edge placement and defects becoming improved, increasing growth as well as the control products between computational and the platform in terms of improving the process window, the process under control as well as the metrology on the bottom. And I will discuss this triangle in more detail in more or less 3 main topics. We'll start with applications, then with EUV and then close up with EUV and High-NA. Our application strategic directions listed here as will be also detailed out by Jim will focus on nanometers. That means more accuracy, more control, more good wafers per day per dollar and then fast into yield. And we do that by our products by having higher productivity, metrology and alignment as well as more robust alignment and metrology schemes. We are driving e-beam solution to get to better process control, process capability. We are focusing on defects, and for that, we are developing a new house of product called multi-beam. We are -- enable more measurement at a fixed cost to allow the opportunity to control litho better. And we're going to have a faster time to solution by our computational litho capability for more accurate OPC using all kind of techniques. I'd like to pick out one, which is our e-beam solution. You see here on the horizontal axis, the defect size. Vertically, you see the productivity. And you see the green line is the single large field e-beam systems, where you see that in the defect size of interest today between 10 and -- today and in the future between 10 and 4, we see the OpEx runs out and we could use e-beam. However, the productivity is pretty grim with single beam. In fact, to translate the waves per hour. The waves per hour is a bond wave per hours around 7,000 millimeter square per hour. So that's up -- higher up in the table. However, we continue to enjoy the e-beam by doing mainly today the -- also the OPC calibration through machine learning. But we need a faster horse, and for that, we're introducing various generations of multi-beams. And this looks very long roadmap, but we are determined to get to -- in the wafer per hour detection speed by innovative solutions in e-beam. And this is what we are through, and we're rolling out as we speak today, our first generation, which you see has a substantial -- almost in order of magnitude increase productivity to our single-beam tools. If you look into our roadmap, it's pretty rich, and I'll leave the details over to Jim. But you see here the scale of control is a major pick where we have more sophisticated control maps on the schedule to be accessed by the application products, fueled by metrology, both optical and e-beam. We have inspection OPC. So the top is the scanner control by more sophisticated interface for both DUV and EUV and EPE control. For optical metrology, our YieldStar, fast stages, multiple wavelengths and device metrology for e-beam, single-beam high resolution, large fuel or fuel and massive metrology. And for inspection, we're counting on multi-beam going to the next level of productivity. And finally, but not last, is our RPC products where with the extended capability on metrology, and particularly, e-beam metrology, we are increasingly using advanced machine learning algorithms to be safeguarded by model innovations to drive the OPC accuracy, which also drives our holistic platform and allow us to have a more and better optimization of our stepper production. With that, I'd like to move to DUV, and I'd like to start also with the new product we shipped since late last year. And what you see here is the ramp-up capability of our newest immersion platform in the first half of this year versus the previous model. And what you see that we have been able to get a faster ramp-up, mainly also driven by higher availability while improving still the overlay 20%. And this is a bit summarizing all the importance of our DUV that we have here, the need of a combination of system maturity as well as still performance improvement. You see that reflected also in our strategy here. It's an overlay productivity, which are traditional litho parameters, but we also have to do more installed base where Wayne will elaborate later on in this program. New markets where we are also developing products for special applications such as FinFET. And we have to work on sustainability and reuse parts and reduce cost. The productivity is mainly done by an overall cost -- overall platform commonality as I will show later. The product roadmap is still a busy roadmap where we are still innovating on all wavelengths, as you can see here. Almost every wavelength has almost a dual use, a critical and a less critical system, both on the immersion and dry. And you see that we continue to drive the overlay imaging and productivity on XT as well as cost down. We also did buy argon fluoride by merging the argon fluoride system on the immersion platform, which gives a boost and overlay in productivity. And we are planning to do the same on krypton fluoride. This has been planned around end -- early in the course of '22 we'll port the krypton fluoride models as well on our NXT platform. We will drive the productivity to over 300 wafers per hour with an opportunity to even go to 400. And then again, the iLine platform continues to be an important element in our product offering, and we also will make major forward commitment to make sure that our productivity on inline is continuing to keep track to our customer needs. With that, I'd like to go to my last element on the products, which is EUV. When we talked to each other in 2018, we were coming just out of the -- how you call it, the dark ages of EUV, so to speak, where we were sub 500 wafers per day performance. And we're almost -- we're able to double to triple that in 2018, so we were very much relieved. But as you see today, we're -- in the last 3 years, we were able to double -- triple that again. And this will likely be a never-ending story to make sure we stay in check with the cost of EUV as well as energy use. And you see it not to a small part, this has been driven or being fueled also by our level of perfection of operating this complex machine where today, availability between 85% and 90% are common. And as we say, we like to bring this in a few years at least to 95% and another 50%. So we probably will not have the 2x and 3x gain we have seen in the last few years, but we still drive aggressively the productivity moving forward. Now what is our strategy there? Again, nanometers, the first time I put it very dominantly. I think the EUV will carry the leading edge of our customer products. Productivity because it is the most effective way to drive the cost down, and we have to also look to hear good wafers per day per dollar invest, which means we have to drive high yields. We enable high yields by supporting less multiple layers and reducing cycle time. And we do that in a stepper -- main 2 elements here is getting the defects down, which is a very important element of our EUV offering, where we are in a vacuum environment where we have to learn again the defect game, both on mask and wafer where we have to drive that down to the next level as well, and this is more an objective on the longer term. We are going to drive to over 200 wafers per hour in [ 1970 ]. We do that in a way to focus an improvement on the source, the mirror, particular mirror heating, we have to control them. Super fast stages in more radical handling and wafer handling and robust alignment. And this element is again synergistic with our DUV folks. However, the game of -- if nothing would be done by ASML, then process complexity is doomed to increase. In fact, doomed to explode. We have seen that in the recent past where -- on the left-hand side, the immersion systems were doing the majority of the job and every time you have to shrink. You have to add additional layers. And the vertical access here is a bit, how you call it, normalized and arbitrary units. I call it process complexity in the amount of mask or cycle time. Horizontal, you see the node. Around 7-nanometer, customers were forced to make the shift. Intel has been very vocal on this on their particular timing. On EUV, they may have done it a bit later than they would have liked to do it, but you see it a major simplification in EUV. Now moving forward, this will repeat again if nothing will be done. So you see the 0.33 will contain to increase the process complexity. Also today, double patterning EUV be done. And there, the High-NA comes in around the 1 and -- the 2 and 1-nanometer node, where we also project major simplification. Now rather than me saying going to the deals, let's say we have a strategy here. Again, it's 1.7-nanometer. 1.7 has smaller features, 3x increased density. It has -- it allows 40% in CDU. It has 50% patterning saving costs by replacing double patterning, higher yield because of 35% less mask. And we're doing this with another major technology boost, where we try to minimize the effort because this is still a very significant effort by driving maximum commonality within platform and also focusing on this complex machine on maturity and serviceability. Rather than just going into the details of High-NA, I'd just like to show you the hardware floating around at our suppliers and our factory where we see real stuff is coming in. And we are probably, at this point in time, the more -- in between way, we have finished the design, and we have -- we need to start the integration and qualify and optimize the system moving forward. That brings me to the EUV roadmap. You see on the top here, the 0.33 driving up over time after 2025 to also 200 wafers per hour, the same for High-NA and starting in 2024. You see also the customer timing here where we allow early access of our tool on our premises integrated with [ Imec ]. And the customer R&D will start in 2024 and higher volume in 2025, which also means that also moving forward, also High-NA and EUV will innovate together in a sensible way. Now let me end up with saying a few words which I call trust. And you could have a lot of words on trust, and I will pick a few out of it. And the one I'd like to pick out is the commonality. Commonality means you are providing all of your platform the same level of alignment, sensor life, metrology, wafer and the likes, so there's a common face to the customer in a number of key elements, but also reducing the R&D and also leveraging on the performance. And every time we make an improvement on the alignment system, it will be implemental DUV and EUV. So DUV commonality. But also within DUV, we have launched 10 years ago the NXT platform. We have not yet rolled it out through our platform. This slide suggests we are going to take a complete rollout of all of our DUV products on all platforms, which also means that we will gain cost advantage and also serviceability advantages by working towards common platform, but also drive the performance of DUV up to the next level. And finally, but not least, the commonality between High-NA and Low-NA is extremely important. In fact, as you saw in the previous roadmap, we are driving to over 200 wafers per hour. And we're using common modules like the source, like the wafer handler, the radical and wafer stage to get us -- to get maximum progress on both platforms driving costs down. The second example is about how we define good wafer per hour per day. On the left-hand side, you see the traditional service model we have today, and Wayne will elaborate on that, where today, we are on deep UV up to 97% uptime. That 3% downtime is what we call a so-called semi-defined downtime. However, in reality, the effective downtime can go up from 3% up to 10% to 15% because certain actions not defined as downtime, but customers' requalification, customer-specific spec tuning is not including that. So what we like to do, we like to gain trust of a customer to a level we can team up with him on the bigger part of downtime and then drive that down to the next level to, say, the 90%, 95%. And Wayne will elaborate it. And finally, energy. It has been positioned. EUV is a energy -- a large energy consumer, which it is. But if you look to the amount of energy being spent on a wafer, then you see that EUV compared to 193 on the left-hand side, given the double patterning nature, but use of 193 will up to 45% reduced costs. And you see here the cost reduction is depending a bit on the productivity. So at 100 wafers per hour, the productivity is less. But particularly, when we drive to the 220 wafers per hour on the end of the roadmap, we have up to a 45% energy saving per wafer, although the machine itself will consume more. On High-NA, you see a similar analysis between High-NA and Low-NA. High-NA could drive up to 46% over time energy users. Although the energy usage is higher, it's still substantially less than continue to have 0.33 at the -- at double patterning. With that, I like to conclude, and I will not repeat what's on the slide. We have a very solid roadmap for the coming 10 years, and we are -- as I tried to share with you, energized almost all business units from DUV to EUV to applications because the contained shrink, which containers needed, will require substantial innovation on all of our platform. Thank you very much.

Good morning, good afternoon, everyone. I'm Christophe Fouquet, and I'm very happy to be able to discuss some of the key points, key opportunity point already being made by Peter and Martin on EUV. First, a few key messages. As Martin mentioned, we believe that we have left this dark age and EUV is now basically one of the key product to extend our logic and DRAM customer roadmap. We do so by continuing to provide lithography resolution, overlay, but also productivity and cost. As you know, today, our customers are using EUV, both in logic and in DRAM for high-volume manufacturing. What we also see and we'll talk about it is that we expect our EUV layer adoptions to continue to increase, both for logic and for DRAM. We talked already a lot about the demand that we have to meet basically in the coming years. And what I will explain to you is that when it comes to EUV, we are going to drive both the number of tools we can ship every year, but also our productivity in order to meet our customer demand, but also be able to continue to provide cost advantage year-on-year to our customer. EUV is becoming a very important part of our roadmap. I think Peter showed you that by 2025, we expect EUV to be about 70% of our business. As such, we are developing a very comprehensive roadmap, both for our existing platform where we expect basically to continue to release every 2 years a new tool in order to meet our customer expectation, but also where we start to look at introducing I&A at the horizon of 2024, '26. And this, as Martin explained, will be a way for us to continue to provide very advanced solution to our customer. Finally, we will talk a bit about profitability. As you know, we have made a lot of progress in the last 3 years, both on the product, but also on service. And our roadmap, our improvement on productivity, on overlay imaging performance will continue to fuel this profitability improvement. If we start, I will talk first about EUV production and the adoption. I think it was very difficult to start this presentation without talking about customer. Martin and Peter have both explained how it is important for ASML to continue to earn our customer trust. And to be honest, when we look at EUV, they have been formidable partner. And without the people mentioned on this slide, the TSMC, Samsung, Intel, Micron, SK Hynix, I think that EUV story will be very different. So these are a few examples, of course, of their public statement about EUV, explaining every time that EUV is in production and becoming a very important part of the roadmap. But for us, it's also a reminder, I would say, now important, the partnership we have developed with them is going to continue to be important moving forward. The second slide, you have seen already, Martin has shown that. So you could ask yourself why to show it again. I think the reason for that is that this is the key to the past success of EUV in the last few years, but also the future success of EUV. Improving productivity, which is the curve you see in blue in the background, is a way to continue to improve, I will say, the economics for our customer. And we have a very aggressive roadmap to continue to do that. Availability is predictability. When we'll talk about this later on when it comes to service, it is critical for our customers to be able to rely on our machine. Today, we are looking at about 85%, 90% availability. As Martin mentioned in his presentation, we are still fully engaged to go far beyond 95%, and we're also fully engaged to continue to increase the wafer per day output. So we'll talk a lot about new products, but I think we also want to make clear that when it comes to our installed base, which is growing more and more, and again, Wayne will touch on that, we are also fully committed to make sure that our customers get the very best out of it. If we look now at the adoption, we believe, as you see it on this graph -- dark green is memory, light green is logic, we see and we believe that our customer will continue to use more and more EUV. The reason for that -- as Martin has explained, is that they want to continue to drive their roadmap aggressively. And the only thing that could stop them is complexity because complexity reserves in yield issue, very long cycle time, and I will say, in some way, threaten the economy. So we are going to see. We believe more adoption, which as a result, and you see it on this curve, will result into a lot more wafer exposed on EUV every single year. So again, here, light green is for logic, and you are looking here not at a cumulative number, but really at a number of EUV wafer exposed every year. Dark green is memory. So the question, of course, for us has been how do we make sure that we deliver on this need. We can never be in a position, of course, where our customer will not be able to basically deliver their own output. So how do we do that? Two ways, and Peter already alluded to it. The first one is, of course, increase the capacity of our factories. We are going to do that. I think Peter mentioned that we are going to double basically our output between 2020 and 2025. The other element, which is also very important, is the increase of productivity. And what you see here is that the productivity will also increase almost by a factor of 2 between 2020 and 2025. Why is that important? Because it allows us to get a lot more wafer out for the same area in the fab. This helped the customer economics, our economics, and this is a much, I would say, efficient way to get the output you need in the fab. So this is a bit, I will say, the focus of EUV moving forward. And of course, this will allow us to meet, we believe, our customer demand. The green bar is now, of course, the combined wafer output you get if you both drive productivity and system output. This we also expect to change every year. So we've been looking almost at this point of time every quarter what's happening in the market, and of course, we will continue to adjust to make sure again that we can provide our customer with a number of EUV machine needed. The table on this slide, I think you may remember it, if you were with us in 2018. So this is just a translation basically of how many tool unit per fab. We look in this case at 2021 and the current 3600D model, depending basically on the number of layers and the number of exposure. So if you take memory, for example, for about 100,000 wafer start per month, 1 to 6 exposure, we are going to look at [ 29 ] system per fab. Same idea for logic. The other element, and I think this has been maybe something we didn't fully expect when we talked back in 2018, this is a DRAM adoption. We were very confident for many years that EUV will have a major impact in logic because we saw a lot of complexity coming up with multi patterning. I think it was, for a long time, less obvious for DRAM. And in the last 2, 3 years, we started to see also the adoption of EUV by all DRAM customers. So if you look at the wafer output today, it's still pretty small, but we expect this to grow over time to about 30% by 2025, which is, of course, in terms of opportunity quite a nice addition to what we were looking at maybe in 2018. Another question could be why? And this is a bit here. So Martin already talked about it. He explained that, I will say, one of the mission we have at ASML is to help customers to reduce the complexity of their process. And you see a bit on this graph where we look basically at both the number of critical litho mask for a certain node at DRAM and also the number -- the total number of process step. The blue bar is without EUV, and you look at a very large multi-patterning scheme. The purple one is with EUV. And what you see is happening is that EUV will both reduce the number of litho layers. But of course, as a result, it will also reduce the total number of process steps because every little layer require, of course, some additional step to support patterning. This is the best way to reduce defects, improve cycle time and reduce cost. This is a bit our view. If we focus a bit on the defect itself, which became, I think, more and more important, a lot of customers have been explaining how EUV has helped them to reduce defect and improve their yield. I wanted to share with you an example that you may have seen most probably already. This is from Samsung, and this is one of the initial data results they got on EUV when applying EUV to DRAM. And what you see here basically is that Samsung did explain that on the first layer, where EUV was implemented, they could see up to 20% defect reduction. So this is, of course, extremely valuable, and more importantly, this is a way to continue to enable our customer to move their roadmap by limiting the amount of complexity with patterning. If we look now a bit forward. So I'm going to talk about, first, the .33 roadmap and then the High-NA roadmap. 0.33 NA is now in production. Customers are relying on the tool now, tomorrow and in many years from now. So a little bit like we have done with deep UV, where Ron will show you later on that for many, many years, we have developed a very comprehensive roadmap, and we plan to continue to do that. We take the same approach with the current platform, and in the next few years, we will continue to improve the NXT platform to provide better overlay, better imaging, and better productivity. And to be honest, we believe that this will be going on for many, many years to come as we don't see the use for this platform to really go down and even less so disappear over time. Then, of course, it will be time, as Martin explained, to make yet another step on reducing complexity. And this other step will be done by High-NA. I will talk about 2 main things about High-NA. The first thing is the value for our customer. Martin already alluded to that. This will be very similar to the value we had when we introduced the 0.33 platform, and I will talk a bit also on how we plan to introduce this platform because I think we want, in many ways to avoid some of the challenges we had when we introduced the previous and current EUV platform. So if we look High-NA, first, we will give our customers some access, some early access to the tool as early as 2023, so that he can kick start together with us their development. Then we will ship our first R&D system in 2024 and 2025, '26, depending on the customer plan, we plan to run this tool in production. In order to do that, 2 models will be on the market. First, the EXE5000, which will be, if you want, the first R&D tool, allowing customer to again get started on process development and then the volume tool that will be the 5200 with an overlay and productivity that will, of course, match the state-of-the-art of our current 0.33 platform. Now if we look at High-NA itself, 2 main value: The first one, of course, High-NA means higher resolution, and this means basically that customers will be able to print smaller feature with a factor of 1.7, resulting into an increased density, almost a factor of 3. Second, and that's also very important, High-NA will provide higher imaging contrast. And these imaging contrast will translate into better local CDU. Martin talked quite a bit about EPE, which is one of the key parameters to define the yield of our customer device. Better contrast, better imaging contrast will help basically to improve this EPE and therefore, the yield on critical layer. Now Martin also said that, so if I had to explain you High-NA, I think by now a lot of you understand why EUV introduction was important, and why replacing multi-patterning deep UV with EUV brought less complexity, better yield, better cycle time. What I'd like to say about High-NA, it's pretty much the same story. The only difference is, we do that a bit later because we will do that at a time where EUV 0.33 is getting again into very complex multi-patterning scheme. But the idea of this graph, which I used already in the presentation, it's just to make that point. The value of High-NA will be the same as the value of 0.33 today. And if you understand why 0.33 EUV was important for the market, you also understand why High-NA will be and why it is therefore important for ASML to be able to deliver this tool around the horizon of 2025, '26 for high-volume manufacturing. If we look now at the change. So Martin talked about commonality. So we also talked about dark age, and I think you all remember that the introduction of EUV to the market was a difficult one. It took, in fact, most probably more than 10 years to really get the product mature enough for high-volume manufacturing. The reason for that is a bit on this chart. When we went from deep UV to EUV 0.33 NA, we pretty much changed everything. We changed the source, as you all remember, and this has been by itself, I would say, mostly the biggest challenge. We also changed a lot of things on the scanner, starting with the transition towards vacuum. And of course, we changed the uptick from transmissive optic to reflective optics. DUV with High-NA is in fact, to try to reuse as much of the knowledge we have on 0.33, transfer it to 0.55 and change one thing because we have no choice but to do that, which is the optic. Of course, High-NA require new uptick. Martin talked about commonality as a goal when it comes to EUV, 0.33 and High-NA, I think this is a very important part of the strategy moving forward in order for us to secure a better introduction, but also reduce our cost and our development time for the platform. So this is a different view. This is the tool, and we look here at the elements of the system, critical stage, projection optic illumination. What you see in the right, the source, the drive laser, the wafer stage, the wafer handler, the reticle handler, this is all common. It means basically that whatever is working today on the current platform will be also used on High-NA. And as I mentioned before, the change will be mostly limited to the uptick, the elimination. You see some changing on the reticle stage, but even there, in fact, over time, we will also drive the commonality for this critical stage on both platforms. So that's a very important element moving forward of our High-NA program. Now I told you that 1 of the 6 we cannot really avoid changing is the optic. So the optic has been a major technical challenge. I told you before that we had a formidable partnership with our customer. It's true in many ways with our supplier as well. In this case, ZEISS has been working with us to develop this new High-NA optic. The picture you see here, so it's not -- we don't have the intention to show off. But what you see here basically is the metrology system we had to develop together with ZEISS in order to be able to bring the optic to the right level of aberration. This is very unique. This has been specially designed for this new optic. And this is, of course, by itself a major technological achievement. So why is that important? The answer is here. So this is one of the High-NA mirrors. This mirror has a size of about a meter diameter. So that's pretty large. And we need to be able to achieve an accuracy of 20 picometer. So this is 1,000 time -- a picometer is 1,000x smaller than nanometer, in order basically to be able to get the right resolution with our defect on the device of our customer. Now to give you an idea also of what is 20 picometer, we made this analogy. So if you basically enlarge this mirror to the size of earth, of planet earth, and you want to achieve basically this accuracy, this will mean that the biggest aberration on the surface of ear -- of the earth, sorry, will be the size of a human hair. So this type of technological challenge we have to achieve, be able to make it, be able to measure it and of course, be able to do that in high volume manufacturing. Now the good news is that those mirrors now are being produced. So we started the production of the first mirror for High-NA, and we believe at this point of time that we have made a lot of progress on the technology to retire a lot of the risk we initially saw on those mirror. A few more picture. Martin was showing you a few. This is an animation, a movie basically of our High-NA factory. What you see here, it's been mentioned before, is that we started to basically build the tool. So the modules are coming in. We are working with many, many different suppliers in order to basically bring the tool together. You remember, first tool will be available for customer first half of 2023 at ASML. So it means that the next 18 months will be spent to really put the system together. But as Martin mentioned, the progress is good. We have been ramping the team, both in R&D and operation, in order to be able basically to deliver this tool in this timeframe. Now one more thing on High-NA. You may have paid attention to the size of the tool, and this is, of course, moving us to yet again another dimension. We are spending a lot of attention on how to make sure that the tool we are going to introduce is reliable. We want to make sure that our customer with a very short time of R&D can go to high-volume manufacturing. How do we do that? The system becoming bigger, we decided to basically break it down into a few different modules, critical optic wafer source, and each module will be qualified independently before we bring it together in order to build the machine. So if you want, we create 4 different mini machines that are going to be built, qualify fully independently so that the integration of the 4 will basically, most probably be more successful than if we had to put everything together from scratch. So I'm sharing you a bit this story because I could understand based on what has happened in the past on the introduction of the 0.33 platform that you may ask yourself. So how does ASML this time can bring this platform basically more quickly and more successfully to the field. So I think, again, 2 main answer to that: The first one is very high commonality with the existing platform. And the second one is, a lot of attention also in the way we're going to build a tool, service the tool upfront in order to reduce the risk even before we ship the first system. This brings me to the last part of the presentation, which is basically the profitability of EUV product and service. We spent quite some time on this 3 years ago. I think you're aware that the progress made has been good. So what I'd like to talk about in order to explain again how we are going to continue to drive profitability, I'd like to focus on the value. This is basically our roadmap. So I told you that we plan basically to introduce a new system more or less every 2 years. Every system will bring an improvement on overlay. Martin was showing in his slide why overlay is important to enable our customers to scale their device moving forward. We talked a lot about productivity. So productivity is good for all kind of reasons. The simplest one is that you need to make less machine for the same output. I think you know that because we have been driving that for all platform for many, many years. In the case of EUV, this will, of course, help profitability. But this, as Peter explained, is also going to be a major tool at the same time basically to provide our customer with the right capacity. Finally, service. Wayne is going to touch on this later on. Service was also a major challenge 3 years ago, very expensive for ASML. We have been able to increase the value of our service by improving our wafer per day input. And this, basically, is allowing us also to use service to also drive the profitability of the business. So this is a bit, the overview, the summary. So again, the dark age, we believe, is behind us. ASML EUV is in production today with 0.33, later in a few years with High-NA. Customer will continue to increase their adoption of EUV. That's what we believe based on all the discussion we have with them. The capability is a major focus. We need to be able to continue to provide to our customers what they need, and we will be doing that by increasing our capacity and our productivity. The product road map, I think we just talked about it, very extensive, very comprehensive road map for both 0.33 and later on, High-NA. What I should add maybe is that, ultimately, we, of course, expect both platforms to run in parallel at customer and be divided between layers depending on their complexity. And finally, profitability. The fact that we have mature platform, the fact that we are capable to continue to extend our road map position us also very well to continue to drive this profitability. With this, I'd like to thank you very much. It's time for short breaks. We have about 10-minute break. And then we will be back, and Jim Koonmen will present the application. Thank you. [Break]

Good afternoon. Good morning. My name is Jim Koonmen, and it is my pleasure this afternoon to take you through the applications story and the business opportunity associated with ASML's applications business. So in a nutshell, key messages. The applications business is projected to grow at about a 20% compounded annual growth rate for the period 2020 through 2025. The applications product portfolio is in support of the ASML scanner business. So what we do is we provide the metrology, the inspection, the control algorithms, the software, the interfaces to the scanner that allow the scanners to perform better. We deliver leading solutions in optical and e-beam inspection and metrology, and collaborating closely with our customers, we integrate ASML's complete product portfolio so that we can help our customers optimize and control their litho process. The primary drivers of growth for the applications business will be the extension of our EPE road map. So we have new offerings in metrology, inspection and control. We have innovative products that combine computational technology, YieldStar and e-beam metrology. And we put all of those things together with leading-edge software products and deep-learning techniques in order to deliver value for our customers. What I'd like to do today is in 4 sections walk you through the applications story. So first, we're going to talk about the market segments that we operate in and some inflection points that are occurring that informs our product road map so that we can take advantage of those inflection points. I'll then pivot to a discussion of holistic lithography strategy that ASML has pursued for the past 15 years and show how we bring all of the applications products together in order to deliver holistic lithography performance. We'll go a little bit deeper and talk about how we actually drive improvements and deliver value in EPE. And then finally, we'll wrap up with the e-beam inspection story, which is all about HMI and multi-beam and how we deliver parts per billion defect control and defect monitoring. So if we look at the market segments that we compete in, there's really 4 major market segments. And going from the bottom, we start with scanner and process control software, going up to computational lithography of Brion, further up into the optical and e-beam metrology, and on the top, high-resolution inspection. If we look at the total TAM in those market segments in aggregate in 2020, it's about $4 billion, and we expect that's going to grow to 2025 to about $6.7 billion. So we have a significant growth in the TAM in the market segments that we're competing in, about 11% or 12% CAGR of the TAMs. The drivers in each of those segments are listed in the slide. So in scanner and process control software, it's all about the transition to EPE that Martin and Christophe have talked about. It's about the adoption and expansion of EUV and high-volume manufacturing. And of course, it's about advanced corrections so that we can do -- we can correct for more complex signatures on the wafer. In computational lithography, it's all about model accuracy, can you predict what's going to happen on the wafer and about reducing compute costs so you can produce reticles in the most cost-effective way. In the metrology space, accuracy, precision and massive metrology are getting a lot of data at a reasonable cost is -- are the mantra of the metrology products and the folks who work on metrology in the applications group. Finally, high-resolution inspection is all about resolution and throughput and ultimately, parts per billion failure measurements. As we go forward from 2020 to 2025, that growth that I told you about is driven by a number of things. And there's a number of technology shifts, which either have been occurring and will accelerate or are going to occur in this 2020 to 2025 time frame. And I'm not going to go into detail on each of these because each of these shifts is what really drives our products road map. Martin showed the applications product road map. And if we start in -- at the scanner process control software, the shift that we're looking at is the transition to EPE control. And what that's going to require is a significant advancement in the number of scanner actuators and the power of those scanner actuators to correct overlay, CD and EPE signatures on the wafer. In overlay metrology and e-beam metrology, we're talking about fast stages, we're talking about multiple wavelengths for process robustness, purposes and in-device metrology, where we don't measure targets anymore, but we actually measure the actual device, which opens up a whole host of opportunities for us. With e-beam metrology, we want to do high-resolution, large field of view, cost-effective massive metrology, and you'll see how that comes into our EPE portfolio in a few slides. For e-beam defect inspection, multi-beam is the key focus for ASML and for the HMI team within HMI, within ASML. And we're also -- for the single-beam e-beam inspection, we focus on high landing energy and guided inspection. Last but not least, for Brion in computational lithography, again, it's about model accuracy. It's about cost of producing these complex reticles. And we apply deep learning techniques and machine learning techniques in order to deliver that value. So that's the products road map, which is going to allow us to take advantage of the industry shifts that are going to be occurring in the next 3 to 4 years. So if we talk about holistic lithography, Martin walked through the holistic lithography story, and I'll maybe just amplify a couple of points. So at the top, we start with the world's best scanners. And at the bottom left, we have Brion's computational lithography and at the bottom right, the metrology and inspection tools in our portfolio. We connect those point solutions, if you will, with applications that are there to help our customers produce cost effectively with high yield. So as you make their process window bigger, things get better for them. So the applications detects the process window, they make the process window bigger and then they help our customers control the process window. Previously, this holistic litho triangle was focused in the center of the triangle on optimizing for overlay and CD. And we ran control loops on overlay and CD and that served the industry extremely well. Going forward, I think the next generation of the holistic litho triangle will be a transition to edge placement error. So edge placement error is a combined metric which deals with overlay and CD and local variation, and we put that all in one metric, which is a very powerful metric, which I'll also describe in further detail. Going forward, through the latter part of this decade, we see the holistic triangle targeting a new objective function. So not just overlay in focus, not just EPE but also defectivity itself. And that's the ultimate link to the yield of the device. So this is the conceptual approach or the conceptual visualization of the holistic litho strategy at ASML, which we've been pursuing for the last 15 years. So conceptually, it looks like this with the triangle. But if you lay it out the way the fab looks, you can see sort of the linear flow of wafers through the fab, where you build the reticle on the left, it goes to litho, you expose a wafer, you can do metrology after litho, you can then etch that wafer and then you do multiple metrology steps after etch. Our vision in the applications products group at ASML is that we want all data from those processes available at every step in the flow. So we bring all of that data into a data infrastructure where we categorize, where we correlate, where we save, where we put the right security around that data, where we put analytics on top of that data and then where we build applications that sit on top of that common data framework. These applications then take that data in, analyze it, create control solutions that can then be brought back to the scanner to deliver real value for our customers. So if I go forward now to talking about specifically how we drive improvements and deliver value in edge placement error. So first, edge placement error, a little more detail on what it is and why it's so important. So on the left-hand side of this slide, you see what we call our edge placement error wheel or our budget breakdown. Edge placement error has components that go from OPC critical dimension errors. It has components that come from, in blue, overlay. And then in the darker orange colors, you see global and local CD errors. All of those things come together in what we call our edge placement error metric. The little film that you see running on a loop in the center of the edge placement error wheel is an example of a unit cell where we've taken e-beam images at many points in the wafer and stitch them together. Now that unit cell is intended to be exactly the same at every point in the wafer. But what you actually see is the contact in the upper left, you see that wandering around a little bit. So there's some source of variation that's producing a suboptimal patterning result, and the edge placement error metric will help identify that and then help point the solution towards where we can improve to deliver value. Edge placement error is so important because it is the best predictor of yield. I talked about how we moved from measuring and controlling overlay and CD to measuring and controlling edge placement error. And the reason why we do that is shown on the right. If you just correlate CD or overlay to yield, you get a reasonable correlation, which has served the industry well. But the correlation to yield of edge placement error is so much better. And that's why we need all of the data that's associated with overlay and OPC CD errors and global and local CD errors. We put all of that data together into the EPE metric in order to drive solutions. Now I'm going to dive into the blue part of the EPE wheel on the left, which is overlay. So how do we measure overlay, and that's done with the YieldStar optical overlay metrology tool. This is an in-house developed diffraction-based overlay metrology that ASML started working on about 15 years ago. And we really started to catch the market need about 10 years ago and have been growing market share ever since. What we do here with the fraction-based overlays, we measure targets where about 800 points on 4 wafers in every lot, we can get a very accurate signature of the overlay on a given wafer. We can then feed that forward or feed that back to the scanner to correct the next lot for that overlay signature. We've been very successful with this product, and now we have for critical layers, immersion and EUV layers, we have the -- we have a very strong market share with the YieldStar optical diffraction-based overlay tool. On the right-hand side of the slide is an expansion of that fundamental technology where we move into the space of measuring after etch in-device with the optical metrology. What that allows us to do, very importantly, is measure just about anywhere on the wafer, especially in DRAM and NAND. We can measure anywhere on the wafer, we can make an overlay measurement, and then that very high spatial frequency signature can also be fed back to the scanner for advanced correction, provide substantial value, and we're seeing very nice growth in our business with the in-device metrology tool in the memory segment. So that's the optical overlay metrology, and that's in blue here in the metrology column in the middle of the slide. But edge placement error is more than just overlay. Edge placement error is overlay, but it's also the global and the local CD. So that's where we need to bring in the HMI EP platform, which is a very high-resolution, large field of view, e-beam metrology tool, which allows us to make millions of measurements in less than an hour on a wafer and get, again, a very high spatial frequency signature that allows us to feed corrections forward to the scanner. When you combine overlay and edge placement error on one layer, an edge placement error on the second layer, you put all of those things together, then you can have an EPE signature, which you see in the monitoring column in the slide. So in this case, you can see as it goes from green to red, red would indicate where you may have a yield challenge. You see there's a portion of the wafer where the yield is not projected to be good. And then you can start to make corrections with the scanner. So what you see on the left, if you make a correction just on overlay alone or CD alone or overlay and CD separately, you get a certain yield. But if you can do it in a combined way with edge placement error and use the full actuation capability of the scanners, you can deliver higher yield. And again, this correlation of EPE to yield is what's shown here and why the industry is moving in this direction. So we need lots of measurements, millions of measurements, thousands of measurements on overlay and millions of measurements on CD to feed the scanner correction capability. And this is where it all comes together with the holistic litho strategy because the ASML scanners are uniquely able to find, measure and correct for patterning variations. They are the tool to improve EPE and yield in the fab. And why is that? It's the case because with the TWINSCAN scanner concept, we not only measure every single wafer that goes to the fab, but we expose every single field on every single wafer individually, which allows us to set the actuation values of all of the knobs that we have on the scanner. It allows us to set those actuation values in an optimal way. On the right-hand side, you can see an example of the number of scanner correction parameters that are fed to the scanner per lot as a function of time. 30 or 40 years ago, customers would feed maybe 10 correction parameters per lot to an ASML scanner, and that would be used to correct overlay or CD or focus. Today, that number is 100,000. So as the scanner has become more sophisticated, we have been able to add actuation capability to the scanner, which when combined with these very precise high spatial frequency signatures of what's occurring on the wafer allows us to understand and ultimately to correct and control and deliver better yield, better edge placement error for our customers. It doesn't get any easier as we go forward. So Martin talked about over the next decade, there's a number of drivers that are going to continue to shrink the size of the patterns on the wafer. So what you see here on the left as we go through time, the size of patterns of different unit cells are going to shrink. So we move from immersion to EUV to High-NA EUV, things are going to get smaller. And that's going to decrease or reduce the EPE budget that's allocated. On the right-hand side, you see the combination of measurements of overlay, of EPE and of defect inspection. The error of overlay control required thousands of measurements per lot in order to provide a good correction. And that's you've seen in the dark blue. In the medium color blue, you see the transition to EPE where we talk now about millions of measurements per lot. And that's what's coming in the first half of this decade. And then finally, in the last half of the decade, when we start to think about measuring defectivity at the scale we need to and then ultimately creating control signals out of that to feed back to the scanner, we're talking about billions of measurements per lot. So that's one of those industry inflection points that's going to occur this decade that will drive the need for metrology as well as drive the need for more sophisticated actuators on our scanner platforms. Do we really need part per billion monitoring and control strategy? And the answer, I think, is yes. Today, server chips can be on the order of 800 square millimeters in size, as you see here in this picture. And the density of transistors or in this case, contact holes, you can get -- in a single square millimeter, you can get something like 100 million contact holes. And that number, that density is increasing by about 1.5x per node. If you want to produce with high yield, you need a very high success rate of those contact hole printing. And in order to get that large server chip to yield or to perform at maximum performance levels, you can't have things like you see in red where you have a contact hole that just simply doesn't image well and doesn't open. So you need 80 billion of those contact holes in order for this chip to function. And you're going to need a metrology tool and a metrology process to be able to understand that and comprehend that. And that's what leads us to the e-beam inspection story part of applications. So high-resolution e-beam has been around for a long time. And we all know it provides superior resolution to alternative techniques, superior signal to noise. It enables the detection of tiny pattern fidelity defects. If you're trying to image -- if the design intent of a customer is seen on the left, that's the design of the chip, and that gets put on the wafer and you try to image that with, for example, an optical tool, the -- just the physics in the optics inherent in the resolution doesn't allow you to resolve those small patterns at advanced nodes. This is becoming an increasing challenge, again, as we move to EUV and High-NA EUV. But e-beam, of course, is a high-resolution tool. So the similar image taken with an e-beam tool is -- let me just advance it. There we go. So it looks like this. So very clear, looks very much like what the designer intended, very high fidelity, and then you can actually make correlations back to the designer intent. And you can look at things like line-end pullback or if there's any sort of necking that's occurring. So you can make judgments about whether the actual chip has been manufactured in the correct way. Martin showed this slide where we put on the x-axis, the defect size; and on the y-axis, the throughput. So I think it was Milton Friedman, who said there's no such thing as a free lunch. So that resolution that you get from an electron beam inspection system, unfortunately, it comes with the cost of not being very fast. So you can't cover a lot of ground. And that's the challenge that we have to be able to overcome. So what we try to do with our road map is we try to, in a multigenerational way, increase the throughput of the e-beam tool while maintaining the resolution capability from Gen 1 to Gen 2 to Gen 3 multi-beam by the end of this decade. And we believe our ultimate target is to be able to satisfy that very high-resolution requirement that allows us to see those defects to the degree that we need to see them and do it in a way where we can get to speeds approaching a wafer per hour. It's a challenge, but we believe we have a viable road map that's going to get us there. HMI has been a technology leader in the e-beam inspection field for many years. They have 2 primary applications that they operate in and that we work in. On the left, we have voltage contrast inspection and on the right, physical defect inspection. Voltage contrast inspection is about the detection of interlayer defects, which cause electric opens or shorts. So it can tell whether a contact is correctly connected to ground or if an etch process didn't work very well and there's an open. You can tell that by seeing bright or dark signals on the surface of the wafer. This type of technique is heavily used in DRAM and NAND. It's also very heavily used not only in R&D but also in HVM as a process tool. On the right-hand side is physical defect inspection, where you're using the real resolution capability of the e-beam tool down to 1- or 2-nanometer pixel size to be able to see intralayer defects like design and process weak spots. The transition to multi-beam allows us to keep pursuing those use cases in those applications but again, as you saw in the previous slide, by climbing the throughput ladder. So you can see some examples. This is our 3x3 eScan 1000 multi-beam, which we have shipped and installed in a number of customers. We also have one in our R&D center at San Jose. And you see some early application learning and development that we've done again along with customers at all those locations, voltage contrast on the left and physical defect inspection on the right. So we're making steps, and we're advancing with our multi-beam goals. We think we're going to be successful with multi-beam because we have the key points of technology that will enable us to be successful. It all starts with the most advanced electron optics, which ASML brought into the company with the acquisition of HMI in 2016. We combine that with ASML's stage technology and the computational technology of Brion, especially the deep-learning techniques. And all of those things together allow us to produce multi-beam systems, which are in operation at customers delivering value today and getting early learning. So where are we, current status on the multi-beam? We are -- as I said, we have 3 tools in the field. We have one tool in San Jose. We're learning at a very rapid rate and applying those learnings to the next generation, which is the eScan 1100, which is a 5x5 or 25 beam multi-beam system. You can see an image in the center of the slide, which comes from that multi-beam system. So you can get an idea the resolution and of the throughput capability. When you start to multiply beams, you can immediately start to get significant improvements in throughput. The key messages on multi-beam are this technology is challenging. It's not an easy thing to pull off, but we are working very hard on it. We've experienced some program delays. We had an original partnership that we had planned to pursue multi-beam with another industrial partner. That didn't work out for a number of reasons. We've also had some COVID-related delays. But at the same time, we've also added additional expertise to our team. We were able to bring into the ASML family, a team of electron optics experts that are located in Delft, the former Mapper team. And they have joined to this effort, this multi-beam development effort and have brought with them not only skills but also significant IP that allows us to move forward. The bottom line is we remain confident about multi-beam, and we remain committed to realizing its market potential. This eScan 1000 5x5, you can see we have it up and running, and we're putting it through its paces. We're doing the final integration steps now, and we are expecting a first shipment of this tool to a customer in Q4 of this year, before the end of the year. So in summary, we operate in a market segment space, which in those 4 market segments have a very good growth profile. We think the market TAM in those segments is going to grow somewhere on the order of 11% to 12% between 2020 and 2025. We believe there are a number of industry inflection points or accelerators that are going to occur in that time frame, which provides an opportunity, which we will fill with our applications road map with inspection tools, with metrology tools, with control software, with algorithms and ultimately, with feedback to the scanner that will deliver improved performance. When we do that, we believe we can deliver a 20% compounded annual growth rate in our revenue in the applications business at ASML from 2020 to 2025. It's all about making the scanner better. At ASML, we combine the capability of the metrology with the capability of the scanner. And we do that in such a way that we can understand, we can measure and monitor and understand the signatures that are occurring on the wafer at these very advanced nodes and feed with cost-effective, accurate metrology and defect inspection results, feed those correction algorithms to the scanner in order to be able to deliver improved edge placement error and ultimately improved yield. So thank you very much for your time and attention this afternoon. And I am going to now turn it over to Ron Kool, who heads up our DUV business, and he'll take you through the DUV business opportunity. Thank you.

Jim, thank you very much. And yes, it's my pleasure, first of all, to say good morning, good afternoon, good evening to you and to present about the deep UV products and the business opportunity of those products. So we go to the key messages of this presentation. Particularly, I like to start with clicking the slide. So the deep UV demand, if you look to it currently, it's at a current -- it's at a high -- record-high level. And effectively, we expect that to remain there for the coming years. And we're talking there about record high both in advanced but also in the mature market segments. And first of all, looking to the advanced market segments, logic and memory, what we see there and particularly technology drive is still very much happening. We extended our road map on all wavelengths both on performance and on productivity, building there on the NXT platform. The NXT platform, being the platform where the machines are coming from with the highest performance, performance being both in terms of accuracy but also in terms of throughput. And that, and particularly on the deep UV side, where we see that in the advanced market segments, the scaling is being supported. But also, if you look to the mature markets there, and here, we include also the -- to that market, the More than Moore applications. We see that presents effectively a growth market opportunity. We build there further on the XT platform where we do modifications, we do adaptations effectively to be able to cope with the requirements of those market segments -- those scattered market segments in the mature market. Also, I'd like to mention where we're looking too is to optimize the installed base for our customers, where we see there is an increased focus, increased demand also in terms of value-added services in combination of upgrades with respect to productivity and to performance. So starting with the markets and starting effectively with, I would say, going back to 2018 and the projection we made at that point in time on deep UV. On the left-hand side, you see I would say depicted the ratio in terms of the systems and the installed base. And you see also moving to the right on 2025 what our expectation was in the sense of we expected the market not really to growth but we expected that the ratio there in terms of the systems and the installed base would move to an advantage to the installed base. We based our forecast at that moment, first of all, on the expectation that the EUV would be adopted and EUV would take away a lot of layers from deep UV. We also were gaining, we were calculating with expected market growth rate that we saw at that point in time. If you now go to current 2021, you see that, I would say, the size of the circle has grown. That's first of all -- but also, if you look to 2025, we expect it to be at the same level as we currently are in 2021, if we talk about deep UV. But also there, if you look to the ratio, now the new shipments actually is bigger in terms of the ratio than what we said in 2018, coming and particularly because the shipments on the deep UV systems, we expect it to continue at a higher level than what we expected in 2018. First of all, the -- I would say, the effect of EUV is less in terms of taking layers away from deep UV than what we expected. Deep UV still remains very important on the high end. We also expect that there is growth in installed base still but also in the mature markets, which is taken into account in this projection. If we're talking about the markets, so I make that distinction in terms of advanced and mature. And for sake of this presentation, advanced means we're talking about resolution in the chip of better than 28-nanometer and better then translates into smaller than 28 on this graph. A mature is, I would say, than -- worse than 40-nanometer. And if you look to the advanced segments because that's usually what we're talking about in ASML, we're talking about the logic, the MPU, about memory. You see that all, I would say, the full assortment in terms of from EUV to i-Line is being used in those segments. If you look to the mature markets, you see more applications where usually we are not talking about. You see different wafer sizes, not just 300. That's what you see in the advanced segment. You also see coming up there 200-millimeter and even 150-millimeter. But you also see that EUV is not being used there. You see that even in some segments, it is restricted to i-Line KrF. And I think it's good to make that distinction already here in terms of the wavelengths within deep UV going from ArFi immersion down to i-Line. The markets, to give you an idea there, particularly if we talk about the mature market segment, if we talk about the KrF, so one of the wavelengths being used in deep UV, we're talking here about a market size on the mature side, which is growing to 45% of that total market. So in sales, you see that market is moving very much. So the growth projection for the next years is coming from, one, what I just said, and actually, Martin showed this slide also, but I think it's good here to particularly stipulate what's happening on the deep UV side. You see in the logic and DRAM, yes, EUV is coming in. But essentially, deep UV still holds there in terms of the number of layers which are being imaged by deep UV. If you look at 3D NAND, so that part of the market, you see essentially that the deep UV is the technology of use also for the coming years. And if you look to our end markets, it says here it's increasingly -- they are increasingly interdependent. I think it shows very much if you look to a smartphone as an example, where usually the whole discussion is, and particularly in terms of the processor unit. And there, you see a 5-nanometer, let's say, resolution coming in. But what we also should realize in the, I would say, in the periphery of that processor unit, you see a lot of other chips being used where not the most advanced technology is being used because now you see also apart from EUV, and I would say the high-end immersion, you see that the other ones are being used very strongly. And you see the resolution is not a 5-nanometer, but effectively, you see there coming to even 130- and 180-nanometer. What you also see, I forgot to stipulate that, is that the wafer size is not just 300-millimeter for these latter segments. It's also 200 and, as I just said, 150-millimeter. If I look to the road map then on deep UV, quickly go through it, it's the, I would say, the standardized format that we show. On the left-hand side, you see the wavelengths. On top, I think it's good to repeat that. It's ArFi, the I standing for immersion. It's giving the highest position if you look to the total deep UV portfolio that we can offer in terms of our machine. And underneath that, you see the portfolio ArF, KrF and i-Line, which effectively what we call dry machines. Next column, you see the capability of those machines in terms of imaging. You see on the high end, 38, and our customers are able to, by double-patterning, actually to go far beyond that, but this is the inherent capability of the imaging of the machine itself. And you see that also given there for ArF down to i-Line, you see it's getting less and less critical if you go down the page. On the top, if you look at 2021, what are you currently shipping, the NXT 2050, but you also see there on the road map on a different color of blue, we have the extension of our road map in terms of 2100, making a step there in terms of the overlay, that's the small nanometer number that you see there. And we project -- also driven by overlay, we project a next step afterwards. You also see that on the high end, we have the, let's say, the 2050, 2100 in terms of the immersion. But you also see there the -- I would say, the mid-critical on immersion, you see the 1980. And there, you see another phenomenon. We project there a step in terms of the throughput going from a current 295 wafers per hour, making a step up in 2023 to a -- beyond the 300 to 330 wafer per hour. So that is substantial. And that means that we get everything out of the NXT platform in order to achieve that. If you now look to the dry part of this road map, you see another phenomenon. Currently, we are shipping predominantly XT machines, but you see there coming in and already shipped on the ArF, you see NXT platform also taking its place into the dry arena. You see immediately what the advantage there is. If you look to the 1,400 on the XT platform, the throughput is about 200 wafers per hour. If you make the step to the NXT, you see that we make a step towards 300 wafers per hour. So it's a bit the same as also was -- Christophe was talking about in the EUV context. This is giving the possibility to have a higher throughput on a, let's say -- if you look to the equivalent in terms of floor space, it's a higher throughput per, I would say, square meter or square foot of foot space. We're going to make that same step on the KrF. On the KrF, in particular, I'm talking about the 0.8 NA machine, which is, I would say, the runner, if you're talking about KrF. We're making a step there from the 860 series on the XT projected to 870 on the NXT next year. And it says here NEXT in 2024. And I think you may expect there a next step and particularly, in terms of throughput on the NXT platform for KrF. On i-Line, the NXT platform is effectively, I would say, overspec. So there we stay on the XT platform, but also there, we're going to make steps. And you see that already projected next year, but also there what is meant with NEXT in terms of the throughput on the i-Line platform. So having said so, knowing that, particularly, there is a lot of demand there in terms of wafer out, so we're going to support that. And I'm referring back also to the presentation that Peter already gave starting this sequence in terms of having a higher throughput, in terms of machines coming out, but also, as I just showed you, in terms of the output per machine. So we make a step there going from the XT to the NXT and inherently, therefore, on the ArF dry and on the KrF and particularly, making an important step with respect to the throughput that comes out of one machine. So going to the market segments in terms of the advanced logic and memory. 2050, this is what we started to ship end of last year. And I think what I'm particularly proud about is, yes, the introduction of the system where, I would say, the ramp-up in terms of the number of wafers coming out of the system at our customers, I think, is very much a sign of how mature this system was already when it was being shipped to the customer. Also, the MTBI here in terms of the reliability, to give you a little bit of idea because this reliability, 180 hours, it effectively comes as an availability for the customer of more than 96%. But I was also proud of that this machine was introduced at the beginning of last quarter last year. And actually, we were able to ship a machine every week, which means that the ramp-up was not just happening at the customer side but also what's happening on -- at ASML. I think that's quite an achievement. If you look to the step that we made here in terms of overlay, basically 20% better than what was on the 2000s. So making a next step on the road map after 2050, the 2100. Again, there, what we foresee is a step in terms of the product overlay, overlay being needed effectively on the, I would say, on the customer road maps. But also, overlay improvements always give a better yield at the customer side. So in itself, making step in overlay always creates value to our customers. And what you see, if you look to the machine here, not going into details here, but giving a bit of a flavor. If you look to the right hand's top, you see that the projection optics in the sense of what we're going to provide is more manipulators to make it able actually to improve the matching between machines. But from that, you see also improved sensors. You see improved handlers in the system and calibrations, all those things to be squeezing out, I would say, what is possible with the NXT platform. Particularly on the NXT, the throughput is an important aspect, as I just said, going from XT to NXT. If you look to the dry side, you can see actually what it's bringing in terms of the, I would say, the number of systems needed. So there, it's effectively reducing the capital investment but also in terms of the fab space. So what we bring there is a reduction in terms of footprint about 17%. And you can see -- on the left-hand side, you see a case being calculated using a 100-kilowatt -- kilo wafer starts per month, where you see, in this case, in terms of representative 5 ArF dry layers, 20 KrF layers, you see a foot space of just over 650 square meters. If you now project that and you do the same amount of wafers out but now with a NXT setup, you come to about a 560 square meters. So in that sense, making that transition step from XT to NXT, we provide customer value in the sense of output, but particularly in terms, I would say, condensed output in the factory environment. Going to the mature side. I think this is a picture showing that we made steps in terms of throughput over the years also on the XT platform. Usually, focus is on the NXT side. You see that on the left, so the ArF immersion, you see the step we made between 2013 up to 2023 in terms of wafers per hour, going from 300 and projected next year to go over the 300. So that's a substantial amount of wafers per hour. And if you calculate that back to wafers per day, I'll show you in a later graph, you'll see it's impressive numbers that you get out per year. But you see also on the XT, if you compare their 2013 and what is projected in 2023 on our road map, you see that substantial steps are being made there on the ARF, on the KRF and also on the i-Line. And we're talking about a 30% improvement there in terms of productivity. And actually, I particularly talked this in connection to the mature markets. And why? And next slide, I'll come back to that. We think that the XT platform, and it's also where it's being used currently is very much suited to serving those mature markets. And it's good to give a little bit of flavor here in terms of what is characteristics of these markets. I would say if you look here to the different columns, first of all, you see it's far more segmented than, I would say, the advanced markets. You see there from analog up to power, you see it's different market segments, different market segments, which come with different requirements. Different requirements, not, let's say, all over the place, but on specific elements. And here and particularly, I'd like to go into the element of the, I would say, the substrate thickness. So how sick is the substrate being used? You see here, in terms of let's say, the indications there, you see a bit connected effectively to the market segment. You see what is standard and what you see a variation there in terms of thin and thick. You see also there is a relation there between the 300, the 200 and 150. But let me just focus on the 300-millimeter wafer size. You see those as a standard. But you see also, if you now go to a thin wafer size, it's about half of that standard. And it means that handling those wafers through systems come with different -- brings different requirement to the system. Of course, a thin waiver is in terms of the solidity of the wafer, it's different than, I would say, a standard wafer. So you have to ensure that it stays flat. You have to ensure that it gets through the machine, which means it's not enormous amount of modifications but still well enough to make it quite specific for serving that market segment. And as I said, we think that the XT platform is very fit for that. So we're using the XT platform and particularly for these mature markets and why? First of all, if you look to the mature markets, the throughput that the customers are asking there is not of that high amount as what we see in the advanced market. Why? Usually, it's smaller fabs that we're talking about. And actually, you try to prevent that the machine is having a too high throughput because now you get reliable too much on a specific machine. So the XT platform there, and I showed you on the road map, with the lowest throughput is very much suitable that, and there, we are bringing all kind of options to that XT platform. I just talked about the wafer handling, but you can also imagine there and think, particularly the alignment that is needed, so ensuring that the, I would say, one layer to another layer is being aligned very, very nicely that you see that is coming with requirements like the alignment to be done on the backside of the wafer. So you see that this is an area where modifications on the machines are needed to serve those customer segments. Making a step to the installed base. It is, I think good to mention there. If you look to the amount of wafers that come out of machine, and I already talked about that in terms of the, let's say, this high throughput that we have been seeing over the years and over the years increasing on the NXT, also on the XT system. You see there is that the number of machines that is able to produce more than 1 million wafers per year has been increasing. Already since 2011, particularly on the NXT platform, you saw that the higher throughput that came with that platform, you see that, that gives rise to higher -- substantially higher throughput in terms of wafers per year. There is a distinction there in terms of -- if you look to the amount of systems in the foundry and systems in the memory. You see that in memory, because it's more like slight variations on the same wafers which are being -- which are going through the machine, you see that is giving rise to a higher throughput on the machines. But it does -- didn't stay with 1 million. Actually, a step has been made there to 1.5 million wafers per year. You see that coming in. And you see also that has been growing substantially. And I think it's noteworthy to mention that effectively, since 2019, the first machine actually we're running that good and also that optimal being run by the customer that more than 2 million wafers per year actually came off, which means that -- and that's also what you see as the customer, yes, performance, but also there in terms of the amount of wafers coming up -- coming off of the machine is an important parameter for our customers. That means that it also giving there is opportunities for the installed base. Because you have been seeing, we have been, I would say, improving our machines over time, which means that we know how to make that step in terms of productivity which translates into -- we are able to increase the capacity of a fab by bringing those means on installed base. And that is with minimal lead time because usually, a lot of those improvements, they are, I would say, minor modifications, particularly the productivity side on the machine and they can relatively easily being brought to the field. The nice is, of course, is if the upgrade only consists of software, and that is where we strive for, but that's not always possible. In a lot of cases, hardware comes into play. This gives an overview there. Just take the 1960, that's the, I would say, in the second column. It came originally with a throughput of 230 wafers per hour. What you see is that -- and now you just have to follow there a little bit lower in terms of the blue points, it's possible to go from, I would say, the column with 230 to the next column in terms of 250 wafers per hour. So that kind of upgrades are possible. And if you look to the agenda, it's called a productivity upgrade. That's what we can make there. But it's not just the productivity upgrade we are able to do. We can also make what we call a node extension upgrade but effectively means that we can improve the overlay performance of that machine, which means that you're not moving from left to right, but now you're moving from top to bottom. And you see there -- at a certain point, you come to a blue dot. So we're able -- actually, if you go to the right, to make the performance of that 1960 to equal it to a 1980. So in that sense, this modularity, I would say, based because we have a platform there and based because already in designing and making the machine we take into account that these improvements also can be retrofitted to other types. This gives flexibility for the customer to move from one type to another to increase capability, to increase productivity. And that's also what you see on this graph here, effectively coming back to, well, let's say, the 1960. You see there, if you look to the, I would say, over lifetime and you can think here, the blue ones is the, I would say, the revenue generated by that generation. You see on top of it, it comes the servicing, but also in particular the upgrades. The upgrades here on the PAP, so the throughput, the software I was just talking about, the node extension, but also small things, UVLS, for instance, standing for the level center. So in that sense, you see that these improvements by porting them back, we give flexibility to our customers, but it's also giving, I would say, revenue, not just, let's say, at initial sales, but also afterwards. And particularly on this one in the next presentation, Wayne will come back to that because this is a connection slide in our presentations. So looking back in terms of deep UV, key messages. I talked about the demand. I think I particularly was going -- we're talking about advanced what we expect there in terms of moving forward, but you also see a growth opportunity on the mature market segments, and particularly for, I would say, our less critical machines based on the XT platform. So on the advanced markets, logic and memory, the technology the innovation, the drive there for scaling is very much driving the steps we're making in terms of overlay on our road map. We make steps there also on productivity on all wavelengths, and we're making a migration there from XT to NXT if we're talking about the dry, the ARF and the KRF. The mature markets, what I said, particularly building on the XT platform with modifications such that these modifications make the machine fit for the use. And the bottom part here in terms of optimizing the installed base by providing value-added services in combination with upgrades on productivity and performance. I'd like to thank you, and particularly this last one is a connecting statement to the next presentation to be given by Wayne on the service business and the installed base business. Thank you.

Good morning, good afternoon. My name is Wayne Allan. I'm responsible for customer support. I very much appreciate the opportunity today to talk to you about our installed base management. And what we're referring to with install base is the servicing and upgrading of our fleet and our customers' fabs around the globe. And as our installed base grows, our revenue is expected to grow at a 12% compounded annual growth rate. We have litho as a constraint in our customers' fabs. And so we have an unparalleled opportunity and responsibility to work with our customers to help enable the best fab capital asset utilization, helping them get a better return on investment by maximizing good wafers per day on the fleet. Customer service value depends really on 3 fundamentals: the first being high availability with minimal long-term downs, in other words, with limited variation; lowest possible service cost per wafer; and working with our customers collaboratively to drive good wafers per day and maximizing the amount of wafers a customer can get through the tool with their particular use case. Upgrades, as Ron mentioned earlier, providing efficient means of improving system output and extending the useful life of the tool for the future nodes, and I will touch on that as well. In order for us to talk a little bit about the growth here, you look at 2015 until now, we've more than doubled the install base growth revenue. And where we expect to be this year is a little over EUR 4 billion in revenue, growing to $7 billion, approaching $7 billion by 2025. And coming back to the slide that Ron presented earlier, it's important to see that this is an example of a tool of an immersion tool that we started to ship in 2009. In the bottom, in the blue, you can see the system revenue sales. This is a cumulative revenue graph. And you can see that as the tools get into manufacturing, into high volume, a growing portion, the green up above, becomes the service revenue, and above that is the upgrade revenue. So if you add the cumulative total revenue and you look at to the -- all the way to the right, a 30-year life cycle of a tool, you end up with service and upgrades, providing a revenue of about 130% of the original tool sale. And this is pretty indicative of what we expect out of most of our platforms. In order for us to talk about maximizing service value, I think it's very important for us to know that fabs are designed with lithography as the constraint of the fab. It makes sense that your most expensive tools, your most complex tools are going to be the tools that you have to make sure that you're always utilizing, you always have product in front of it. So if you look at the Pareto that's in the upper left, this is an example of a 100,000 wafer start logic fab, an EUV fab where the first equipment group is EUV or NXE, the second being NXT. And then going forward from there, you have various workstations such as CBD, etc., diffusion, et cetera. And as you go to the right, you see that more of the workstations have buffer capacity. So the -- what's dictating the capacity in the fab are the ones on the left, the NXE and the NXT. And then as you move forward, you want tools that don't cost as much to be having extra capacity so that you can surge product back through based on nonlinearity in the fab and keep it in front of your most expensive tools. So if you look at this example and why this is important is for an EUV logic fab, that's 100,000 start fab, investment in that fab that a customer is going to have is around EUR 24 billion, including the equipment in the fab itself. About EUR 4 billion of that -- excuse me, EUR 6 billion of that is on the NXE and NXT fleet. So a 1% improvement in the constraint, the 1% improvement across the NXT and NXE is going to yield more than a 1% improvement in capital asset utilization on the EUR 6 billion. It's 1% on the EUR 24 billion because you have buffer capacity elsewhere. So as you add capacity in your constraint, you basically enable you to not only use your constraint better but also the other equipment in the fab. And that tends to be the case up to about a 3% to 4% increase, and then you may start to run into other constraints and had to do some purchasing. But for the most part, litho is a constraint of the fab and improving a 1% improvement in litho really drives heavily the capital asset utilization and the overall fab. I think it's also important to note that, that buffer capacity that I mentioned is there for nonlinearity throughout your flow. Again, if you have a tool down, you don't want to end up building up whip and not getting it back in front of your scanners. And so that buffer capacity is also driven by long-term downs on the scanner being the constraint of the fab. If you're down for more than 12 hours, which is considered a long-term down, you can have a lot of whip pile up. And then when the tool comes back up, it has to be able to surge through those other workstations and get back to the scanner before idling. So by reducing the amount of variation of availability, we can also have a customer having less buffer capacity needed in order to make sure that they're able to maximize the utilization on the scanners. So when it comes to customer service value, it really depends on 3 fundamentals: The first one being what I just described, which is high availability and minimal long-term downs; the second is driving the lowest possible service cost per wafer so that we have recognized value from the customer, but we can also get the value that we need for the investments that we are making in service; and of course, maximizing good wafers per day. So working very collaboratively with the customer in order to ensure that we get the most amount of good wafers through the tool. I'm going to touch on these and give a little bit more detail. So high availability and minimal long-term downs. The chart on the left is a box plot of availability. It's a 13-week average for the last 3 months. And for DUV, which is a mature platform, as was mentioned earlier by Martin, we're at about 97% average availability. As you can see the variation down below. We're primarily working there on reducing the long-term downs, which is that tail of blue dots down below in order for us to drive about 1% up on overall availability for DUV, again, being a very mature platform. As we go into EUV, a relatively immature platform, we're at about 87%, 88% availability today and we need to shift the entire population up at least 7%, and then, of course, work aggressively also on those long-term downs of that tail at the bottom. We do that through, of course, working on design improvements and continuing to perfect the parts in the tool through software upgrades, but also using technology to service our systems and I'll get to that in a minute around the diagnostics and remote expert support. In addition to that, of course, we're always focusing on operational improvements and site-to-site benchmarking to make sure we can learn across our broad vast network. Lowest cost per service is really looking at driving the cost per wafer of service down. And so looking at our targets, we plan on 2025, a 20% reduction in cost per service -- cost per wafer in service on DUV and slightly larger on EUV, given the maturity of the platform. Again, some of the same things we're working on in order for us to improve availability also impact costs. You can imagine, again, better the tool is, the more available it is, the lower the cost is to service it. And some of those technology -- some of the technology that we're bringing to the field around diagnostics and remote expert support also help us do service in a much more efficient way. If we look at the graph that was originally shown by Martin, again, focus on availability alone, the 97%, this is a DUV example, isn't sufficient. As Martin mentioned, there are process-specific inefficiencies that exist with the customer's use case that are not necessarily the same spec that we sold the tool for. So this customer use cases really require us to take a look at any additional downtime that might be within our standard uptime definition, but still not able to produce wafers for a customer. And we have to work very collaboratively with our customers in order to work on reduction of qualification, reduction of defect monitoring, these types of things in order for us to gain the opportunity, the 5% to 10%, which is actually a bigger opportunity by focusing on a new service model where we can really work collaboratively with the customer to maximize good wafers per day. If you look at these things, and off to the right, I have a dot next to the programs that affect availability and long-term downs, cost per wafer -- or excuse me, good wafers per day and cost down. And so you can -- it's just, I think, intuitive that on the top that if you improve a part, it's going to improve availability, you'll enable more good wafers per day, and it will reduce cost. So I think that's pretty intuitive. But if you look at the bottom as well, there are cost reduction programs that are specifically focused on costs that may not improve availability or good wafers per day, but they're still important because it means we can drive our cost down. Those are things like freight cost reduction or establishing a local repair center. But there's also activities that are unique to just focusing on good wafers per day that are beyond the historical availability focus that we've had. This is again looking at in-line defectivity monitoring and control strategies with our customers, scanner matching improvements, alignment mark optimization and working collaboratively with a customer on things like track delay reduction. So this is what we do very closely with our customers in order to maximize good wafers per day. Now I'm going to give a few examples of this, so I can put a little bit more color behind it. I think one of the things that I wanted to show was on our remote expert support, which became exceptionally important during COVID when we had travel restrictions and quarantine requirements that kept us from the ability to have experts fly into the regions to help support them on service actions that might be uncommon or to really troubleshoot a very technical problem. So we had to bring in remote support and connect our experts that may be on the source, maybe in San Diego or in Veldhoven so that we could get that knowledge right to our field service engineers in the region. And by doing that, of course, we cannot have a tool down waiting for somebody to fly in, go through quarantine, et cetera. So it became even more important to than it was historically. In addition to that, getting the data from the tools back to Veldhoven so that we can look at data to determine what is potentially causing a problem for a tool so that we can diagnose an issue faster and get that back to the field. So this remote technology and connecting our experts to the field is an exceptionally important improvement that we are focusing on. Let me show you what that looks like. [Presentation]

This has been a very important step up in our service capabilities, having the ability to connect our experts to the field in real time. There are additional things that we're working on for technology. We're continuing to improve upon our reactive diagnostics. These are trace data off the tool that we can look at sensor data, where we can look and monitor those, and we can see certain patterns that are dictating, whether -- what the diagnostic issue is, what is driving the tool to be down and what the diagnostic plan is. So having that help guide our engineers in the field is very helpful to reduce long-term down. So we can quickly get to what the service action plan required is based on looking at that data. And of course, more and more, we are pushing towards proactive diagnostics where we can monitor the health of the tool and we can see shifts or trends in the data that may indicate that we're going to have a failure down the road so that when a service engineer is working on a scheduled maintenance, they can add additional service actions to prevent long-term downs and get into preventative mode. If you look at working closely with our customers on maximizing good wafers per day, I wanted to show an example that we work with one of our memory customers on improving the throughput on their 1980 fleet. When we started working with this customer, the wafers per day was about 4,500 wafers per day. And you can see quarter-by-quarter, as we went through the engagement that we were able to work together with the customer to increase up to 5,300 wafers per day one year later. So a pretty significant increase. Now how did we do that? Again, working very closely with the customer on optimizing production settings. We also rolled out some productivity enhancement packages, which also gained some additional throughput. And of course, focusing on reducing the long-term downs and improving availability, which has also enabled about 200 wafers per day improvement. So all of these things together is how we maximize good wafers per day for our customer and ensure that they can, therefore, get the best utilization and best return on their fab investments. Finally, I want to touch back with the conversation that Ron started on, on extending the useful life of the equipment through upgrades. I think if we look at an example, there are different types of buying behaviors that we expect when we're upgrading our fleet in the fabs. Anything that is a software upgrade, we're going to have -- always have that in demand. But when you have a hardware upgrade that is a bit more disruptive, it requires longer downtime, and it's in high demand at time of lower utilization and customers are a bit more opportunistic as to when they go for the software upgrade or hardware upgrades that bring the tool down for more time. And these upgrades, of course, are focused on productivity, but also imaging and overlay and even life extension packages for tools that are 20-plus years old that may need some proactive part swaps so that they can stay productive. I want to give an example. Ron mentioned the system node enhancement package. This is an example of taking a 1960 platform and snapping it, upgrading it to have an equivalent performance of a 1980 tool. So if you look off to the left, it's a diagram of the tool. The green part of the tool is a part of the tool that we didn't have to touch, and the blue part is where there were some modification or some additional parts that had to be swapped out in order to bring the kind of performance that was -- is equivalent to 1980. So of course, it's a much more -- it's much more intrusive, takes 6 weeks to do, but it's much cheaper than, of course, buying the new tool. So being able to extend the life cycle of this tool. And if you can look in the middle, you're looking at the machine overlay, the dark blue is an example of a new tool coming out of the factory for 1980, and the right is this upgraded tool, which has the same overlay performance. And while upgrading on the performance for overlay, we also installed the production enhancement package to drive the amount of wafers up and increase 28% throughput on this particular upgrade. So the upgrades are really a powerful and inexpensive way for customer to continue to drive value off of their installed base. So to wrap up, installed base is continuing to grow. It's a growing part of our business. We are very focused on a value-based service model where we can really truly drive the kind of value that our customers recognize where we can share in the risk and reward there and improve the productivity and performance also through upgrades. With litho being the constraint in the fab, again, our opportunity and also our responsibility is unparalleled in our ability to work collaboratively with our customers to really drive the customer's return on their fab investment, improving their capital asset utilization by ensuring that we're maximizing good wafers per day across the fleet. And in doing so, we're going to be really focused for service value around driving that high availability and minimal long-term downs, very low variation, lowest possible cost per wafer and driving up maximum good wafers per day by working collaboratively with our customers. And again, we will continue to drive the upgrades that will provide an efficient means of improving system output and extending the useful life of the tool. Thank you for your attention and focus. I appreciate the opportunity. And with that, we are going to have a 10-minute break. Thank you. [Break]

Good morning, good afternoon, good evening all. So you deserved this break, didn't you? Because there was a lot of information that was shared. You were inundated with information. So therefore, I think you really deserve the break that you just enjoyed. And to me, the humble responsibility to try and translate all that rich information that was shared with you to try and condense that into a language that we all speak, which is the language of euros. And that's what I would like to do in the next half hour. So to that extent, there's a few things we would like to discuss. Of course, we're going to look backwards a little bit, look at the historic performance of ASML. Then we would like to look at the 2025 time frame. Then I would like to give you a bit of a sneak preview into 2030. And then we're going to have a conversation on the capital allocation policy, which in essence is unchanged in comparison to the policy that you have to do. So just reiterate what our policy is and how that pans out. So talking about the historical shareholder value creation. I think it's important to look at this slide first because this really tells how ASML in the past decade has invested into its position in the marketplace. And these have been pretty significant investments that have been made, as you see here. Investments into R&D, investments into CapEx, both related to R&D, but also CapEx, obviously, in manufacturing capability and what have you. And we also made a very -- a limited number of very specific M&A transactions that were really geared towards either removing a number of obstacles, if you like, that we had on the road map are really building our suite around the holistic lithography proposition. So those were the limited number of M&A activities that we did, and you see those in the boxes on top of the bars. So this is what we've done. And that middle lien, sometimes these investments and sometimes the R&D expense was a little bit more than the 13% that we put into the model. But I think it was money very well spent. And I think you see the result of these investments actually in the performance of ASML in the past couple of years. And I think this really tells a very significant story. So this gives you the CAGR of 14% of ASML's earnings per share over the period since 2010, a 14% growth, really driven by an engine that fires on all cylinders. So on the one hand, obviously, system revenue growing at a 10% CAGR since 2020. But then also the previous topic that we discussed, that Wayne discussed, installed base management growing at a 20% CAGR over the time period. And then those 2 also driving the gross margin, so driven by revenue growth, but also very much the gross margin amount at a 13% CAGR, driven by the profitability of the -- of deep UV, of the apps business, and also recently, a good improvement in the profitability of our EUV business. And then finally, all of that leading to the 14% CAGR that we can report over a 10-year period for earnings per share. And that's something that has also been appreciated, I think, by our shareholders because that drive for EPS, that continued drive to further increase our earnings, and that helped, I would say -- and that was helped by the way, also by the fact that we were able to do share buybacks in that period. So profitability and the share buyback led to the increase in EPS. And I think that's also been appreciated and is reflected, I think, in the fact that we have a TSR, a total shareholder return, annualized compounded at a rate of 29% and therefore, I think, significantly outweighing the respective markets that -- and indices that we compare ourselves against. That's the past. But of course, much more significant is how does everything that you just heard in the past couple of hours, how does that translate into continuing growth for ASML? And that's where I would like to spend the lion share of my presentation on. Starting with the 2025 scenarios. And the way we do it and the model that we deploy, the model that we use in order to come up with our estimates has not really fundamentally changed from the last time that we met in 2018. So the starting point really is how do the end markets grow. So the end markets for semiconductors, how did they grow? And you already saw that reflected in Peter's presentation, so I'll quickly pick up on that. And then that demand really then gets translated into what do we think the wafer demand is. So what is the wafer demand building off the end markets development? So what does that mean for demand for wafers? What does it mean for the capacity? The wafer starts capacity that is -- that results from that wafer demand. And in order to do that, we really translate then that wafer demand into -- for the individual nodes. What does that mean in terms of the different layers that are required? So what do those layers require in terms of our litho technology? So you have the end-market demand, we have the wafer demand that, that translates into, and then we translate the wafers into what does that translate into layer count and therefore, what technology, litho technology is really needed, in order to meet the wafer demand capacity that we're looking at? And then we translate that into the ASML share of that litho market. And then finally, we add to that the installed base business and the growth estimate that we have there based on all the drivers and dynamics that Wayne just talked about. So this is the starting point. I'm not going to spend a lot of time in this because, in essence, Peter discussed this. But all in all, if we look at the next 5 years, we're looking at a 7.4% CAGR for the semi and the end markets, and you see the composition here on this slide. And as I mentioned, this end market then gets translated into, what does it mean for the wafer starts per month for the capacity that is really needed in order to drive that. And again, you would have seen this presentation or this slide, also in Peter's presentation, leading to a CAGR for the period 2020 through 2025 of 9.9% on logic and MPU. 5.2% On DRAM and 5.7% on NAND. And then you also would have seen there is a 3.9% CAGR, not on this slide, but 3.9% CAGR for the more mature side of the logic business. So those are significant growth drivers, obviously, for our business. The next question that becomes, how does that translate? So how does that wafer demand -- and how does that wafer start capacity, how does that translate into litho demand? And how can we expect layer or how can we expect node on node, how that litho spend is going to develop? What you see here is a continuation from what we did in 2018, and it actually builds on the slide that Martin presented to you earlier on. This really gives you the percentage breakdown per node of the different technologies. So a few takeaways here. First off, very, very clear. Node on node, you will continue to see quite significant growth, 30% on logic and MPU. 20% on DRAM, 10% node-on-node growth in terms of lithography spend from one node to the other on NAND. So that's the buildup there. So that's one thing to bear in mind. Second thing to watch for, I think, is to see that you see actually a High-NA kicking in. High-NA is the light purple, if you like, bar that you particularly see on logic, starting at the panels, but the panels, about 1.5-nanometer node. And then you also see at the last node that we depict here on DRAM. So that's where you see that High-NA is actually kicking in. So that's important to note. And this coincides with the time frame that Christophe gave you earlier of really High-NA going into high-volume manufacturing in the '25, '26 time frame. So that's one thing to note. The last thing I would like to call out on this slide is that, in fact, you do see that while EUV is getting more and more important in the mix, it's not that immersion is going away. Immersion is still a significant part, particularly of NAND and DRAM, but also in the Logic business, you do see that there is a steady portion of deep UV and I would say, immersion in particular, that is relevant here. And just to be clear, when I talk about the distribution of the technologies in this bar, we're talking about euro amounts. So while Martin gave you the layer count, if you like, for the different nodes, the real physical layer count, if you like, this really gives you the distribution of the euro amounts for the different technologies, all adding up to 100%. And then the final element that you need in the model in order to get up -- to get to the number that we're going to present in terms of the number that we think we're going to achieve in the 2025 time frame. The last element, of course, that you need in order to get to that number is the installed base business. And here, you see that in the past 5 years, we've seen a CAGR of 13% there and of a much higher base, obviously, in 2020. We believe that for the period, all the way through 2025, we can drive an additional 12% CAGR of that much higher base in 2020. And this really leverages all the things that Wayne just mentioned. So obviously, the growing installed base, both in deep UV and in EUV. But also this whole notion that service becomes pivotal and is pivotal to customers because I think what was very powerful in Wayne's presentation was this acknowledgment that while lithography is the bottleneck, if you like, in terms of availability in the fab, there is significant leverage of really getting the availability up and having more good wafers out. There really, lithography is a key way to get there. And as we demonstrated, even 1% extra uptime there is a very significant value-enhancing measure for the customer. And therefore, doing more and more of this, really bringing a lot of value to the customer also means that we are able to share some in -- and some of that value enhancement of the customer. And finally, as I think was very powerful in all the presentations, also ones from deep UV and the presentation by EUV, it's very clear. There is a lot of potential in upgrades and really upgrades, continuing to keep the tools at a very productive level such that they continue to provide significant value to the customer. A combination of all of those things really drives a CAGR of 12% of the 2020 base all the way through 2025. So if we get all of that, if we get all those ingredients, it might be good to just look at a few of the model assumptions that we have for 2020 -- for 2025 before really turning then to the numbers. And a number of these really follow from the conversation that we just had. First one to highlight is that the market share that we have for the different technologies that we provide, has substantially remained similar to the last time we talked in 2018 with one exception. So EUV still at 100%, obviously, ArFi. So Immersion at 90%, Dry has actually gone up. So Dry has gone up from 60% to 65%. And it's important to call out that market share is not just market share per technology. But if you look at the mix and the fact that EUV, in particular, has become a more significant element of the total pie of the lithography sales. With EUV increasing there and the fact that ASML enjoys a 100% market share there, that means that for the total lithography market, of course, the market share of ASML has gone up quite a bit. So if you compare '25 to 2020, you would see a market increase in market share there. That's one thing to call out. Next thing to call out, if you look at the Logic business. As a reference point there for the 16-, 14-nanometer, the reference point there is now 315 k wafer starts per month, which compares to 270 k wafer starts for the same period as we discussed it in 2018. So this really tells you that what we call stronger for longer. So this really means that the nodes become longer, but also the capacity is actually added to what we expected back then in 2018. So rather than the total capacity for the 16-, 14-nanometer node kind of stopping at 270, it has gradually moved on to 315 for all the reasons that particularly Peter mentioned when he was talking about the continued drive for -- the demand for deep UV. You also see that we are more optimistic today in terms of the reduction on node on node. So this time, we only talk about 10% reduction in the most -- a 15% reduction in the low scenario, which is a lower reduction, if you like, than what we talked about in 2018. So all in all, stronger for longer, I think, is the key message that you see here in the Logic segment. And then you also see 20 to 30 EUV exposures and the first High-NA node going to 4 to 9 exposure. So that's important, I think, on the Logic side. If we then move to DRAM, we see a bit growth, which has actually improved in comparison to last time. I think it's interesting also to there look at EUV. For EUV last time, when we talked in 2018, we had a higher percentage of the wafer conversion that we were actually talking about 80% to 90%. So that has gone down a little bit, and that's the result of, I would say, the regional distribution of DRAM manufacturing but also the choice of specific customers to have -- for some to have a later insertion in there. But what you do see, and I think that is important is that the customers that do choose to have EUV inserted into DRAM, you actually see a significant increase in the number of exposure, so now we're talking about up to 8 exposures of EUV. But in 2018, we thought it would kind of stop in this time frame at 5. So it's very clear that those customers that choose to do that are actually excited about it. And I think some of the comments that Christophe made are underpinning that and are actually driving up the number of EUV layers more forcefully than we anticipated. And then finally, not a lot of change, I would say, on the NAND side, although the bit growth has gone up a little bit. So those are the key assumptions in the model and the comparison, if you like, to what we had last time in 2018. Not going to spend a lot of time on this. These are some of the key challenges that we face within the industry. And this is a summary, if you like, of the risks that we typically have in the annual report. So what could stand in the way of us achieving our ambitions. Quite frankly, I think, if you look at this as the bottom line, is a lot of what we have here, the lion's share of this, we can and will manage. That's our responsibility. What really drives the difference in the different scenarios really is the end market growth dynamic. So that's why that is the main distinction, if you like, in the different scenarios and also the geopolitical landscape, that some might argue maybe present some risk. But definitely, if you look at all the tech sovereignty discussions that we have these days, also presents a significant opportunity for us. So that's something that -- those are the things that we believe will ultimately be decisive, if you like, in terms of what are the scenarios that we're going to end up in. This is the -- these are the scenarios and the numbers that we presented at the Capital Markets Day in 2018. And there, we said in the most positive scenario. So at high EUV insertion, by the way, we don't make that distinction anymore because we believe EUV insertion is a given. So there is no point, we think, in further having a discussion on is the EUV insertion low or high. It's given that the industry has embraced that both for Logic and for DRAM. So high EUV insertion at the time against a high market growth led us to a EUR 24 billion scenario at the high end. And what you see now is that, that EUR 24 billion is actually now the low market. So in the low market scenario, we now actually present a number that is similar to the high market growth scenario that we presented to you last time. And if you look at the differences on what we have in terms of unit count, for instance, in the high market scenario back then in 2018, for 2025 in comparison to what we have today, there's a few things that are really interesting. First off, you see that High-NA, it's really kept here at 9 -- at 5, sorry, it's kept here at 5, both for the low market and for the high market, high-NA kept at 5. And that is lower than what we had even in the scenarios and some of the scenarios that we had in 2018. And that is not because there is any delay in the program or in the shipments. Quite frankly, we're on track there. This really is driven by revenue recognition. We do recognize this is a new technology. It's also a technology where the install time, so between the shipments and the final acceptance by the customer takes some time. So that's why we've been pretty conservative in terms of the number of High-NA units that we actually take into revenue or expect to take into revenue in 2025. So that's why, actually, in both scenarios, you only have 5 unit numbers there. So shipment in all likelihood will be quite a bit higher, but revenue recognition is simply kept at the number of 5 in this model. In terms of EUV, in the low market, you see a slightly lower number there than the number that we had in the high case scenario that we presented in 2018. But there, you should recognize that the EUV tools that we expect to ship here actually have a 60% higher productivity than the C-tool. So there is a very significant upgrade in terms of the productivity. So that's why even though the unit number is down, the value and the capacity that it brings to customers is, I would submit, at a higher level than what we had even in the high market scenario in 2018. Immersion is higher at 70 here. It's higher even than the high market case that we had last time. So really demonstrating as we also had in a few of the other presentations that Immersion really is, while being replaced at a number of layers by EUV, is still a very strong workhorse within the industry. And on the Dry tools, more or less in line with what we had last time. And also the installed base management, more or less what we had in the high market scenario, again. In 2018. But on the high market scenario, of course, it's quite a bit more significant and a very significant step-up from the high market scenario that we had last time. We kept High-NA at 5 for the reasons I just gave you. But here we see EUV going to 70. So rather than the 48 that we have here in the low market, we actually think we can drive that to 70. And as a matter of fact, our building -- are anticipating capacity to even go over and above that point. Immersion, you see here at 87 and Dry you see here 290. So very, very significant numbers. And then an installed base driven by a higher installed base in total installed base management would get you to EUR 7 billion. As I mentioned, we are building more capacity than what we're showing here in terms of sales, and we think that is important because we are assuming, and that was also something that Peter presented in his story. The question is, on the tech sovereignty, how much inefficiency, if you like, is being introduced into the supply chain there. And then, frankly, we are quite modest in the numbers that we have here. So we do not assume a lot of inefficiency in the manufacturing capability of our customers as a result of tech sovereignty, but we'll have to see how that develops, but there could be some upside even from that element. And that's why we believe we should be building actually a bit more capacity than even the unit numbers that we present here. In terms of how do we compare the different models, the 2018 model. And here, I picked the reference case, if you like, so the middle growth scenario of EUR 19.3 billion. What drives it all the way up to the EUR 27 billion that would -- that is the midpoint, if you like, of the guidance that you see in those 2 scenarios. Main drivers, of course, EUV. And EUV here is actually EUR 4.9 billion is low-NA, EUV of 0.33, both driven by units and by the ASP of the tools. And because of the cap that I discussed with you on 5 High-NA tools that actually drives down the revenue with 0.6. So 4.9 incremental in 0.33, minus 0.6 as a result of the revenue recognition consideration that I gave you, gets you to a EUR 4.3 billion increase in EUV at the midpoint. On the non-EUV business, this is primarily by Immersion. Immersion accounts for 2.5 out of the 2.8 that we have here. And then the installed base business, primarily driven by the fact that the installed base is really going up. And as a result of that, also the revenues that we generate from that is going up. So that gives you an insight into how the 2 midpoint scenarios, how they really compare. That gets you to the financial model. So you already saw the top line, so EUR 24 billion to EUR 30 billion with a midpoint of EUR 27billion, so that's the sales number. Broken down, as you see here in system sales and installed base sales. Gross margin that we expect to be between 54% and 56%. Please bear in mind that because this is the first -- this is the initial point, if you like, of taking revenue on High-NA, that, of course, there is a bit of a negative impact on the gross margin resulting from high-NA, and that is included in this 54% to 56% bandwidth. R&D is here at the bandwidth of 3.4 to 3.7. At the midpoint of R&D and the midpoint of total sales, you get to approximately the 13% that we've talked about in the past. SG&A, again, there, EUR 1 billion, again, at the midpoint of sales you're getting at a little under 4%. CapEx, also expected at EUR 1 billion. Cash conversion cycle at 200 days, not changed in comparison to last time and an effective tech rate of 16%, which has gone up as a result of a number of tax changes in the different geographies in which we operate. Finally, in terms of predictions, how do we look at the next 10 years. So how do we look at 2030. And here, I should say that what we present here really is what I would call the reference case. So we clearly see that in comparison to the 11% CAGR for the full period that we present here. We could clearly see certain deviations and also certain upside, primarily driven I would say, by the fact that what we do here is that we actually keep litho intensity constant at the 2025 level. And that, of course, an assumption that some people might challenge and say, wait a minute, with High-NA kicking in and all the value that, that could bring, should you not expect that litho intensity actually goes up in the second half of the decade. We've not modeled that. So in this 11% CAGR for the full period, we've actually modeled in that litho intensity is going to remain constant at a 2025 level. We've also modeled in that our market share remains constant in comparison to 2025. So that's the second assumption. And in terms of the base, the semiconductor end market and the semiconductor end market growth, that's really where we've used the VLSI number as the basis. And if you then make the computation, so we have that end market growth, you'll assume a constant litho intensity as from 2025. You assume a constant market share then that gets you to an 11% CAGR over the 2020 through 2030 period of 11%, both at a systems level and at the installed base management level. But with the comments that I made that if we're able to drive up litho intensity, that, of course, there would be further potential. Final comment is on the shareholder value creation, and it's pretty clear that with the numbers that we've indicated that ASML is going to generate very significant free cash flows in the years to come. Based on those models, that is a clear expectation. Our capital allocation policy really hasn't changed. And in essence, what that means is that what we need in the business, we will use. So we will use that for R&D. We will use it for CapEx, et cetera. So what we need, we will use. But even then, we believe significant cash flow will be available. We do not plan to do significant M&A in the period all the way through 2025. There might be an opportunity here and there. But there, we will be very, very focused and we will only do it if it helps us in removing obstacles that we observe in getting to achieve the road map. So that really is the way we look at M&A. So we don't expect that to be at a very high level in the period all the way through 2025. Dividends. As you know, our policy is to look at a growing dividend. And as many of you know, there is this guidance out there from good governance organizations to suggest that you should observe a 30% payout ratio of dividend in comparison to net income. And we definitely look at that in our dividend policy. Whatever remains, as long as we -- and obviously keeping a strong and flexible balance sheet as we put it here, whatever remains is available for share buyback. And you've seen that we drive that quite significantly. So, dear friends, that is it from my end. So I think we've demonstrated significant shareholder value creation in the past couple of years for the reasons we mentioned, driving a very strong strategic road map, generating strong EPS on the back of improvement of earnings and the reduction of shares through share buyback. We think we're in a very good sweet spot in terms of growth, both for the first half of this decade, but also for the second half of this decade, and I've given you the numbers there but also the potential over and above maybe those numbers. And we think with that, we will see a significant growth opportunity through '25 and beyond '25. I think the future for ASML is bright, and we're very, very happy to be able to share that bright future with you as shareholders. With that, thank you very much for your attention, and I'd like to hand over to Peter to wrap up the presentation.

Well, thank you all. And let me first start off with 2 apologies. And the first one is we've probably taken up too much of your time. But for a reason. I mean, we wanted this presentation or this Capital Markets Day to be about strategy, to be about how we see the future for the next 5 to 10 years. And that cannot be superficial. We have to be detailed. We have to be like ASML, focused on content. And that's why we probably inundated you with a lot of data, a lot of information. And it's basically like going to a too big meal. Some of us probably had this. And you know what happens. There's a digestion period. And I think that's what we're probably going through. We have to digest this because I would like to see us talk about our Capital Markets Day data and slides on the core of our business, whether it's EUV or deep UV, applications, installed base business, our financial performance and our metrics. I would like this Capital Market Day to be an anchor point for the next quarters or years to refer to. Because this is not about the next quarter. It's about the next decade. So apologies again for the time. But I'm pretty sure, also bearing in mind what we did in 2018 and 2016, that this will be a very nice anchor point for the discussions we're going to have together. That's the first apology. The second one is we have to apologize also to Skip and his team that I didn't join the do's and don't's just before this meeting. Of course, we have do's and don't's because Skip is always very careful that you don't let the free radicals out without telling them what they should do and what they shouldn't do. And I missed the part about we don't miss wearing a tie. So this is -- I'm the only one not wearing a tie. So I apologize, I was late. Now having said that, I'd like to wrap up. I'd like to wrap up before we go into the Q&A. Just the key messages, I think, just a summary. This is Slide 2, by the way, sorry about that. Slide 1. I talked about the global megatrends. I think it's clear. I think we are in a highly profitable and very innovative and competitive, which is important, ecosystem that will actually fuel growth across the entire semiconductor market. And that will also increase litho intensity as Roger showed and -- also earlier showed, we think it will grow up to 25%. And for modeling purposes, we try to be conservative. We just kept it at that CAGR for the second half of this decade. And our product portfolio, I hope it was clear our product portfolio is very much aligned to the customer road maps. I mean, the #1 thing about our strategy is customer trust. We have to deliver cost-effective solutions. We have to deliver solutions that provide value in EUV, in deep UV and applications and in installed base management, and we will. And when we look at those -- and if we do that, I think you can rest assured that we will do that, we are based on different market scenarios, high low. We've done that before. We have an opportunity to reach annual revenue in 2025 anywhere between EUR 24 billion, which is the low market. And if you look at the assumptions that Roger shared, it's pretty dire in a high market between EUR 24 billion and EUR 30 billion with a reference case, we use of normally, we sit in the middle, like we did also in 2018, about EUR 27 billion, with a gross margin in 2025 between 54% and 56% with some of the, I would say, caveats that Roger mentioned like some dilutive effect in 2025 of the early introduction of High-NA, which will be a positive margin otherwise. But as you understand, will not fully be on the levels that at that moment in time, low-NA has. Now having said that, all those numbers, 24 to 30. If you listen carefully to what Roger said, we did not really include any effect, a major effect of this technological sovereignty drive. We did not do that. The full high-NA shipment value is not in there either. But you know us, we are not a company that hangs out of the window a big time. I mean, we feel very comfortable with these numbers and with the growth rates. And let's use that as the anchor point for our discussions over the next couple of years. So we see significant growth opportunities. We actually, not only in core litho but also in metrology inspection. I personally thought Jim was very clear on a complex subject. And also, Wayne was very clear on our opportunities in service and field upgrades. And I think this will provide this CAGR, which we talked about, the 11%, which basically is, for us, a continuation of what we actually have seen, and it's our estimate of 2020 to 2030 with everything that I just said about potential opportunities to the upside. Now having said that, it's all great. But we have to make sure that we can deliver. So we have to create a supply chain with our partners that actually can meet those new capacity requirements and the higher shipment numbers. It is all about making sure we can meet the customer demand and customer trust is with us and customers can trust us. So we will invest. And like Roger mentioned, when I talk about 50% higher capacity in deep UV and double the capacity in EUV, but in deep UVs, might argue there's some overcapacity. Yes, that's by design. We want to make sure that we are not in a situation where we are today, where we simply cannot supply our customers with what they want. Now it's an integral part of our strategy, that's ESG. It's an integral part of what we feel is our responsibility to actually meet the requirements and the demands of all our stakeholders, our customers, dear shareholders, our people, our partners and community, our society. And we will continue to invest in technology leadership. You know ASML, we will do that. Roger showed it, significant R&D numbers, but that will enable us to provide that value. Now -- and of course, when we do all that, and it's our commitment that we will do that, we expect to also return a significant amount of cash to our shareholders in a combination of dividends and share buybacks. And with that, I'd like to close my closing remarks or end my closing remarks and hand it over to Skip for some logistic instructions on how we continue with the rest of this afternoon. Thank you.

Thank you, Peter. All right. Thank you, Peter. So thank you all for, as Peter mentioned, staying with us for the past 4-plus hours. We have roughly another hour to go to Q&A. As Peter mentioned, this is very important. It, obviously, sets our strategy for the coming years. So we know it's a lot to digest over the coming months, and we'll work with you all. in that front. As far as presentation, this does conclude our presentations, and we're going to take about a 10-minute break, and we'll set up for the Q&A panel with our presenters. So we'll come back. We'll address the questions that you've submitted during the presentation. You can still submit questions during the Q&A. As a reminder, if you can provide your contact information, we will get back with you if we do not address your questions. So please provide the contact information, and we can ensure we get back to you for anything we did not get to. And also, we please ask you for any feedback to help us make this event better. And lastly, we will take a roughly -- a little over a 10-minute break, we'll set up, and we'll be back at 5:15 CET to start the Q&A panel. Thank you. [Break]

Welcome back. We now have our 7 presenters here on the Q&A panel. I have your questions coming to me that were submitted through the course of the presentation. So let's just get started. The first one will be to Peter. Can you explain the underlying drivers behind your 2025 and 2030 revenue growth, including contribution from reshoring deep UV, EUV installed base and metrology inspection.

Do I understand it correctly that -- from the 2025 to 2030?

Yes.

I think like Roger said, I think he said it in the closing remarks. We assume a CAGR from 2020 to 2030 of about 11%. That is based on the fact that the litho intensity that we see growing through 2025 -- from 2025 to 2030, we don't assume any change there, neither up or down because the second half of the decade, there are many -- there's customer road maps. There's -- we need to think about the detailed mix of advanced versus mature, Logic versus DRAM. And we -- there's too many assumptions there. So we'd like to be on the, let's say, we could call it conservative, but on the side of stability. So little intensity with the end market growing, which we showed and WFE growing with litho staying at 25%. And with respect to reshoring, you effectively asked us to gauge what the inefficiency will be because of this reshoring, which I think is very difficult. So we've not included that very much in our assumptions on the growth rates. It will happen, but to what extent rationale or, let's say, of our key customers will dampen it or will not, that's a bit of a guess. So we didn't put it in. So this is why we said it. But it is the reason why we're building more capacity, as Roger said, because there will be something. So we need to have -- a kind of a guess is what we did and said, we don't want to underinvest in this sense because we know there's going to be additional demand. So yes, I think it's the base that we had -- for our 2025 model, and Roger was clear about that. And actually, for the second half of the decade, we, more or less, stayed stable. We could argue that's a bit of a conservative view. But like I said earlier, we are known for not paying out of the window too much. We're not going to do that this year. So is there some upside on these drivers? Yes, sure. High-NA? Yes, sure. But there's another Capital Markets Day in next couple of years, so we can give you an update on the second half of the decade.

All right. Thanks, Peter. Roger, somewhat related, so maybe you can add anything additional here is we're indicating -- ASML is indicating 11% CAGR growth to 2030, taking into account the high end of the 2025 revenue guidance of EUR 30 billion, and then the growth from the '25 to 2030 is approximately 6% CAGR.

Yes, but that's a bit illogical to approach it from that vantage point. So leveraging off what Peter just said, we introduced a reference case, if you like, for the CAGR over the total 10-year period. Remember, we're talking about something that is 9 years out. And that's also the reason why we said we're not going to, for 2030, come up with different cases, right? So we're not going to come up with 3 different scenarios. We're just going to have an estimate of a CAGR over that period, leveraging also the VLSI data of how the semiconductor end market develops, in order to get to what you just said, you would assume that in the first 5 years, you are in a high-growth market scenario. But for the total 10 years, you're at the mid-market scenario. That is very unlikely to occur, right? I mean -- so I think that's the wrong way to do it. I think if you want to compare the first half of the decade to the second half of the decade, then you need to assume the same scenario, right? And then you need to look at the mid-market growth or the midpoint, if you like, for the first decade that gets you to 27. And then you get to a CAGR of 8% if you take that analysis because then you get the 27 at that stage at the midpoint, working towards 40, right, people have figured out and that gets you to an 8% CAGR. But then still, everything appears, that applies, right? So that still means that you're assuming only mid-market growth because that's how we interpreted the VLSI data, only mid-market growth. It assumes a litho intensity, which doesn't change as of 2025. So I think we should look at this reference case as just a point estimate 9 years out. But if you want to draw a comparison between the first half of the decade and second half of the decade, you got to go for the same scenario. Otherwise, you're mixing apples and oranges.

Okay. And stay tuned for next Investor Day.

You bet.

Okay. So our next one goes to Martin. Do you fear disruptive innovation elsewhere in the world that might threaten your strategic road map?

Well, disruption can be anything. So let's narrow down what I like to understand about disruption. So you could talk about disruption at our customer side, going through different device architectures. I do believe that any -- even disruptive change on our customer side continue to require little lithography, perhaps in a different mix, but we are offering our products and full product portfolio, so we don't find. So if we narrow down what disruption could be a little. Now there, I think the disruption as we see it today -- in the recent past, we were also fearing disruption that before EUV was established as a production tool that we could have an alternative technology competing in EUV. I think where EUV today is and our planned innovation moving forward, I think it will be unlikely something else in the EUV. And if it needs to be EUV, then it needs to be somebody else doing EUV. And I think our continuous innovation focus as we do today, we're going to driving the productivity up, driving the aperture up. And with our current status of R&D and technology pipeline, we see still new products coming up on the horizon where we can leverage what we have developed for High-NA in more products around the EUV. The innovation is so strong that I don't feel there will be a major disruption from a different technology than EUV. Now on the mainstream lithography, we have today competition. We always have been in competition. As you noticed, no, it is not disclosed, but we are spending more money in our DUV products collectively than we -- in every year did before. So we continue to innovate also on a DUV system. Ron elaborated on that. So we continue to have a major -- we continue to offer differentiation also [indiscernible] not only on the EUV side.

Very good. Okay. Our next question goes to Roger. What is your outlook on pricing, more specifically for EUV and High-NA products for 2025 through 2030?

So on pricing, I think if you look at 0.33, EUV, I think it was pretty clear from Christophe's presentation that what you're really looking at is a road map of continued improvements running on all cylinders again there. So you see throughput improvement and quite significantly so, right, particularly the step towards the 3,800 gets a significant uptick from 160 to eventually to 220. And overlay, so imaging quality. So I think the road map very clearly established that there is a quite significant step up in the value that is being provided to the customer. And I think historically, what you see is that there is a good correlation between particularly the throughput improvement and the ASP improvement. With the mechanism that we have to share value on a very fair and equitable basis with our customers, I think it's fair to say that to the extent that we're able to continue to drive improvements as surface on the road map that, that will lead to significant improvements in ASP as well. On High-NA, I think the price for the tool that will go into high-volume manufacturing, so the 5,200 as per the road map that Christophe presented, the price tag that we're looking at is significantly higher than EUR 300 million.

All right. Well, over here, we have Christophe. Capacity. On the EUV, there says 70 EUV tools per year by 2025. Is this only the 0.33 NA technology?

Yes, I think this is indeed 4.33. And I think we mentioned 70 a few times. This is always related to the demand we expect. I think this was also shown clearly by Roger's model. So I would say 70% is not a max capacity per se. It's really what we think we made it today in 2025. Of course, this is something we will continue to watch. I think we mentioned all of us, we are in a very close contact with our customer. We will do what it takes for the end to meet the customer demand. And on top of that, I think this was a bit in the video at the beginning, I think you have seen that we started to build capacity also for High-NA, and indeed, this will come on top of the 70 we mentioned.

Yes. Very good. Switching to depp UV, Ron. How much is your capacity for deep UV machines? How much capacity do you need maybe on a long-term basis? I guess long term, not defined here, but we talk 2025.

Yes. we talked -- particularly Peter was then talking 2025. I think in my presentation, I talked a bit, let's say, on shorter term, let's say, '22, '23. The numbers mentioned there were -- and that was a combination of the capacity in terms of machines going out there of the factory. And I would say the throughput increase that we provide on our machines. So then we came to a number of about 1.7%. I think, Peter, you mentioned in your presentation to 2025, about a number of 2. I think another checkpoint is actually what Roger presented in his presentation in terms of the scenarios that you saw in 2025 and then you saw numbers actually also in terms of underlying what the output numbers are there. I would claim that about in that -- in my 1.7, it's about 35% coming out of the number of systems and 35% coming out of the, I would say, of the, let's say, the throughput increase in terms of the systems. And I think that's also taken into account over the period of the next years.

Very good. Martin, yesterday, ASM International said 3D DRAM could happen in 2026, and will lower expensive EUV steps. How should we think about EUV application in DRAM as the industry moves to 3D DRAM? Will it become like the shift to 3D NAND where [indiscernible] grow in intensity while litho intensity is lowered and only relegated to greenfield.

This to me?

That's to you, yes.

So I think I'd like to refer very much also the public statements of our customers rather than its suppliers. But in our discussion with customers, we have a broad range of requirements on DRAM. And in that discussion, I think the 3D requirements are not having space yet. We know -- are aware of publications on that. But the difficulty getting to a transition for 2D to 3D is at least very uncertain of timing, and it's not highly visible on the road map discussions we have with our customers. Now if it happens, then there is also not a single embodiment today. I mean you'll see different inventions being announced around 3D structures. And it's also not clear to what extent we will have different lithography requirements. And it's not exclusive that our advanced lithography may also be applicable to 3D over now. But for now, as you can see, as an example, as a public announce for Micron recently, Micron changed to EUV in 2024. Now why would Micron announce that if they would go to 2026 into 3D not needing EUV. So there's still quite some discussion on when this could happen, if it happens. And if it happens, what would be the lithography requirements.

Okay. clear. Maybe this is a question for Roger or Wayne, but it was has to do with services. So do you intend to apply the services billing strategy that you use for EUV for the DUV business? So maybe it's Roger and then Wayne and Ron, you can all comment on this. Are clients willing to accept and what are the impacts according to you on services at revenue growth and profitability? Actually, I think it's...

Yes. I think for DUV, we showed what we expect the install base revenue to be over a 30-year horizon, and it's about 130%. And I think that's a good number to focus on for both the service of the scanner, the laser and the optics and in addition to that, the upgrade. So I think 130% is a good number. And that includes moving towards more value-added services.

Yes, clear. And we said this impacts according to you on services revenue growth and profitability. I think you talked about that with [ Integrate ]. So the other one, Roger, that was asked was, can you provide some explanation for growth in capital spending and R&D through the '25 time frame as well? Should investors expect each to grow more slowly, rapidly than revenues or gross profits?

You mean beyond '25?

It says 2025. Through the '25 time frame, so...

Yes, until the '25 time frame, I think it's pretty clear, right? I think that was part of the presentation that we gave. So in the model all the way through '25, we said that R&D, we -- at the midpoint, you're around 13%. And CapEx, we had at EUR 1 billion. So from that vantage point, you could say that that's actually going a little bit down as a percentage of revenue in comparison to what we had. And in all likelihood, even though we don't present a model beyond 2025, but at a certain time, we would expect some leverage from the scale that you're getting.

Yes. Okay. Makes sense. Peter, this is -- do you see -- do you foresee ASML could later ship EUV machines to Chinese chip makers? And how do you assess the geopolitical uncertainties ahead for equipment makers?

Well, I think the EUV question is on the table, is with the Dutch government. So I'm not going to preempt any discussion that -- or a decision that they will take. So I can give you that -- I cannot give you the mobile number of the prime minister because I will not do that. But that is at his desk. So well, you have to wait. I think generally, I had a discussion, as you can imagine, I have a lot of discussion with customers of late because of the current situation, a very high demand for semiconductors and some of you have the equipment also lithography machines. And actually, one of the customers said it was actually -- is in need of 28-nanometer capable machines, which, of course, we have very short of everything is that basically, we need 28-nanometer because we need to invest because 20 nanometers for ADAS, it's for advanced driver-assisted systems. And we need that. The automotive industry needs it. Well, if we really look at who's investing right now, and as deep UV the immersion is not leading edge. It's the Chinese. So actually, we as an equipment industry, we need to ship to at least those customers that are actively building fabs and provide the world with -- not with EUV-related technology but with mature technology that we all need on a day-to-day basis. So I hope that will -- there's no indication that it is not the case, but I think that's why I would think and believe that, that will simply continue because the world needs it.

Yes, makes sense. Next one is, I guess I should have finished, Wayne. There was another one here that had deep UV. You mentioned the 130%. The question was, and maybe it's also your stuff here, but would EUV look different under the new service models? Would it be more comparable? What would be a similar figure for the EUV tool lifetime?

Yes. Installed base revenue is expected to be about 5% of the equipment price on an annualized basis. So that would take it over 30 years to be 150%, so a bit higher than EUV, right? Clear?

Thanks. Roger, Martin's presentation seems to suggest lower litho intensity of 1.5 nanometer versus 2, talking about the nodes and 1 versus 1.5 in the key logic market. Can you comment on how this might impact your revenue?

I don't think that's what Martin's presentation said. I think what Martin's presentation said is that at 1.5 nanometer, Martin said, the number of layers goes down and the number of exposure goes down as a result of the fact that Hign-NA kicks in. That doesn't mean that litho intensity goes down. As a matter of fact, it doesn't. As I demonstrated in my model, you see the nodal node transition, litho spend percentage goes up. So I think that's a misread of Martin's slide. Martin's slide very clearly shows a decrease in number of layers, but that's as a result of High-NA kicking in. And of course, that's where the value for us is, spend. It is a value because it reduces the number of layers, it reduces complexity, it avoids triple, quadruple patterning on the years, et cetera, et cetera.

Very good. All right, Jim, I guess you don't get off here, so you're on here. Can you please provide your market position, market share and key competitors for the 4 market scenarios and applications that you presented?

Sure. So the 4 market segments that I discussed, we'll start with the scanner and process control software. That obviously goes hand-to-hand with our very strong scanner position. So we would consider our market share in that segment to be about 90%. So market position #1. second market segment would be computational lithography. We consider -- we measure our market share is about 50% of total market share. And we would also consider our market position is #1. Competitors there are Synopsys and Mentographics, which is now part of Siemens. Third segment is optical and e-beam metrology. And in optical overlay metrology, we have about 50% market share of that total market segment. We're much stronger on, as I mentioned, on the immersion in EUV critical layers, less strong on image-based overlay for lower-end layers. A key competitor there is KLA. The second part of that, the e-beam metrology part. I would say we are in the range of 10% or so, 5% to 10% on e-beam metrology. And the competitors there are Hitachi High-Tech and Applied Materials are the main competitors. So we're probably 3 or 4 in that segment. The last segment is high-resolution inspection, which we define as a combination of the single-beam inspection or e-beam inspection market plus the high-resolution portion of optical brightfield inspection where KLA is very strong. And mask inspection we also include in that TAM. So if you put all of that together, HMI is about, again, about 5% to 10% of that market segment. And the competitors there, again, are KLA and Applied Materials are the key competitors there. So ballpark numbers, but I think that gets to just the question.

Yes. Perfect. All right. Thanks. So Christophe, can you please elaborate on how many Hign-NA systems you are planning to operate at your facility in the beginning of 2023? And how many machines you are planning to ship to your customers in 2024 and 2025?

Yes. So on the first question, we always at ASML plan to have a couple of machines basically initially to develop them, to qualify them. So in 2023, we'll have a couple of tools at ASML. And for the first time, one of this tool will be available for some of the time to the customer. So if we look at the number of tools will be about -- it will be 2 and about half of the system may be available for interaction with customer. On the shipment curve. I think I talked about 2 High-NA model. The first one is the 5,000, which I described as R&D system. There, I will say we plan to ship maybe 5, 6 of those tool to basically meet the R&D need of our customer. And this will happen for most of it in 2024. After that, we will shift towards high-volume manufacturing system. And we expect, of course, as the results to increase the number of shipments. So it's still difficult to have an exact number. But typically, we'll ramp this tool most probably, I would say, doubling the capacity for the first 2, 3 years, maybe.

Okay. Clear. Peter, you mentioned we structurally underestimated capacity in the last few years. What did you change this time to build your capacity model, not to make the same underestimation out to 2023 beyond?

Yes. That's good. That's good question. I mean, I could answer that for you. That's basically also a part of it. When you -- when we go back to 2007 for the first time when we did our scenario setting, our scenario goal setting, and when we -- and I look at the reference case at that time and the reference case, later on, we did it for a second time a couple of years later. And after the third time, we've done it for 2020, '25. I think first time we did that, we actually were as a year earlier reach that scenario target. And the second half, we had 2 years early and we would be a couple of years early on the third time that we did that. So you could say, why did you guys learn? You've had 15 years' time to get your act together. But every time -- we are not the only one. I mean when you look at the capacity that's been installed by our customers, it's also not enough because we only ship what our customers want. So it's somehow we continuously structurally underestimate the power of semiconductors and application of it. And that leads to all kinds of services and products. That's why I said, and I like this Qualcomm slide because it actually shows -- a icon shows all these different areas where this distributed computing tech space, which, of course, we never really got right. So -- but when you look at this underestimation, and you could almost say it's growing underestimation of the capacity, we intuitively said, okay, let's follow our model, and Roger explained our model quite clearly. Growth rates that we align with analyst firms and then we look at the road maps and we start thinking about wafer demand and about our tools. And let's use that same model. But then see how we underestimate this, and then we come to a conclusion that we need to build more. And we will build some overcapacity as compared to that model. But we also think that we might need our space and we will meet those overcapacity where we will not be in the situation where we are today where we simply have to say no. And also some of the uncertainties. We talked about the technical [indiscernible] driver what are we showing. We don't know how much inefficiency that's going to create, but we have to make sure that we have some additional capacity above the numbers that Roger mentioned, yes? So -- and again, it's also a matter of what Ron said, it is the number of units times productivity per unit, yes? So it's the wafer capacity that we need to be able to ship. So it's -- yes, I cannot give you an exact number. We're looking into this right now. We have a couple of scenarios, but we will build some more capacity than the numbers that Roger gave.

Okay. Thank you. Ron, this is on deep UV. Can you explain the cannibalization of deep UV by EUV being less than you predicted a few years ago? Is this temporary due to the current chip shortage or relatively permanent?

No, I think it also connects to what Peter was saying in terms of my modeling, what's happening there in terms of the, I would say, the stacks of our customers. I think we underestimated there what the content of deep UV is. I think that's basically what issues. I mean we have a -- yes, we try to get a site also by the interaction with the customers to get a view in terms of, well, this is what's happening to our best knowledge, but we are not making chips. So we always are there in terms of making our estimates in terms of what's happening there. And what you see is yes, certainly for the note further away. I mean, I'm guessing is bigger than the notes, which are closer to current, let's say, operation. So there you see that, I would say, the divergence in terms of our prediction and what's happening, what's getting bigger. I think that -- yes, I would say, positive -- on a positive note, the result being, indeed, that the demand on the deep UV side on the merchant side is high than what we expected.

All right. This is Christophe or Roger. Will your gross margins of your low and EUV systems continue to improve with future iterations of EUV systems as we go from D to E to F as ASPs increase and you share this additional value, higher productivity imaging overly with your customers? Or is there a natural limit to EUV gross margins? I don't know if this is for Roger or...

Yes, I can start with the technical part at least. I think Martin also covered that. I think as long as we know what we can improve the performance of the tool, starting with productivity, but also overlay. I think by default, we will improve the value of the system. And as a result, mostly also the profitability. That's one part. The other thing I think it was shown a few times by when, on the service cost, I think by Roger on the overall service, we are driving our cost down as much as possible, which is, of course, another way for us over time to also have a second to now basically to improve the profitability. So I think as long as we drive those 2 things aggressively, and as long, of course, that the researching value is there for our customers, I think that there is still room to improve, of course.

Okay. Yes. Okay. Wayne, does installed base management have a subscription model? And what percentage of sales are installed base is recurring? I think it's more of a question on how much of a consistent contract versus...

If you look at our installed base for NXT systems, all of those tools are under a full-service contract. And that is something that typically every 3 years, we negotiate with a customer and move forward on this. As we move forward, we're looking at more value-added services and getting that into the contract. So we can also be incentivized to drive mortgage wafers per day and not just focus on availability. So that's on NXT. On XT, we still have about 90% of the systems that we have a service contract, and we're moving more of those back into full service. But that's kind of a work in progress. And on NXT, we have all of our tools are under full service contract as well. And that's also something that we negotiate about every 3 years.

Yes. So very high NXT.

NXT is all of our systems. NXT, all of our systems. And XT, a growing amount of resistance are coming back into a full-service contract.

Yes. Okay. Clear. Peter, does ASML have pricing power? We saw several customers increase their price offering. Is ASML considering a price increase?

Well, most of our contracts with customers are long-term contracts and we just honor those contracts. And we price the tools, and I think Christophe referred to it, based on the value that we and our customers believe that do -- has. And that's the price. I think particularly important in a situation where our customers are with respect to High-NA emersion and EUV basically dependent on us, that's 100%. So when you have contracts and then a lot of contracts and you're the only one. And you also know that our strategic priorities, customer trust. Yes, he doesn't jive with breaking over one side contract and just cranking up the price. I mean it applies based on value of the tool. And some customers would also argue, yes, under the assumption that we deliver full value, he's also a full of time and everything that goes with that. Well, we all know that we're still in a maturity ramping phase. So that we not get already off of pricing. But it is what it is. We do value pricing.

Okay. Martin, I can't ask a clarified question here what the exactly mean, but it says what is it possible -- will it be possible to develop technology at ASML that allows for picometers instead of nanometers? I guess seeing customers...

Yes. I think Christophe already explained in his presentation, I did let it out on accuracy, the millers have been posed. And I think Christophe referred out of the recent results, we had achieved with our High-NA production, where we were for a long time exposed about accuracy, we could police those meter, which is very critical for getting our specification. We just said last week and a celebration of us getting to 20 picometer baseline, 20 picometer. At this point, 0.2 nanometer. So we are already in picometer regime. And this is also the challenge moving forward. Then we drive productivity to make sure that with the increased intensity, we are maintaining those picometers during operation in the system. So we're already challenged with that level.

Okay. That was a human error stretched across the entire earth. Okay, so let's see, the next one...

There's another point here. You talk about human error. I sometimes skip it because I felt that no one of us has seen it picometer or a nanometer. And certainly when we joined this company and everybody on time, you think you know the nanometers, you don't until you start trying to drive it down. So it's a kind of a magic measurement you go below 1 nanometer.

That magic happens. Sometimes, it happens, yes.

I have another question for Ron. It was before I went blank -- I think I need another one. Yes. It was the on 200-millimeter, how low can a technology go? And can it continue to scale with 200-millimeter emergent? And what do we, in practice, see?

For the 200-millimeter systems what I said, particularly we target the XT platform, which means that if you look to current resolution, it's effectively given by what ARF is doing there out of my head, I think we're talking about -- what is it? A 65-nanometer there in that area. Let me put it that way. I'm missing -- because of all this, I'm missing the question actually in terms of what...

Yes. The question was on 200-millimeter, how far technology, it will emerge and enable it to continue? Can you go all down to 7-nanometer on 200-millimeter, for example?

Good point. On the XT, I was referring to that in terms of coupling 200-meter there. I think because we had experience on the, let's say, on the XT platform also in Immersion, if this really is a hurdle, yes, we can also look to there, what's -- how to break that hurdle. So I don't see a fundamental issue there in terms of going to better resolution in 200-nanometer. And what we see in practice is that particularly if , let's say, an application, is there and doing that scaling, then usually it makes sense actually go to 300-millimeter. So they'll leave it 200-millimeters, go to 30-millimeter. And then you come -- let's call it the mainstream in terms of retail machines, you'll effectively end up there.

Got you. So you can scale continue.

Yes.

So it's not a wafer size. It's not the gate. You can take like -- keep going on a practice. Maybe they don't always do that for the reason. Martin, this is a question for you. What is the impact of the move from FinFET to gate all around on litho intensity?, Is the introduction of the gate around the reason why 2-nanometer and 1.5-nanometer nodes have the same mix of litho tools?

So I think we have not consummated the gate all around yet, so it's still in process. So we base ourselves on the road map. I think the layer assignments I showed in my presentation includes the expected gate-all-around change. So whatever that is, it's included. And we don't see a negative or positive impact on gate all around. Although it's true that the gate all around structures most volumes also there, the [indiscernible] are mostly likely built with advanced processing tools, are 3D kind of structures.

Okay. Wayne, in the installed base management, the company talked about increasing collaboration with customers to drive better productivity and availability. How should we think about the opportunity for deep UV service to transition to a more outcome or wafer output-based service model similar to EUV? And is this something that customers are interested in?

Customers are definitely interested in anything we can do to work with them on maximizing the wafers per day, whether it's on DUV or EUV. And so we are moving toward a model where we are being incentivized for additional wafers per day beyond the classic [ e-10 ] availability. So we are moving in that direction across our NXT fleet. I think that customers are open to that. We have to make sure we're delivering a service product that is cost effective and that we're adding the value and adding that mega wafers per day. And I think given the economics behind it that I described earlier, I think customers are very open to that.

Okay. Good. Roger, what is the time from the shipment of an EUV High-NA machine to revenue recognition?

That's a really good question. And had I known that I could to be more specific in my 2025 model. There's a number of dynamic here. So one dynamic is obviously the -- going back, accounting rules say, typically you take revenue at the point in time the customer accepted at the time. That's the starting point. Then if you can demonstrate it, in fact, when you have the factory acceptance has done at your own premises, that then the installation at the customer site is more or less the [ foundry ]. It's just the formality and you can actually recognize revenue upon shipment. So that's the main thing. So the question now becomes, you first need to build up this stack pattern. And that's what we have to do. But of course, then you first have to it. And Christophe discussed with you the shipment plan. So when the first tools are being shipped. If indeed that demonstrates that a track pattern is there, then we will be in a position to actually have revenue recognition be done at a point in time that the factory acceptance test is being done. So there's still some evidence to be built, but we can only do that at a point in time with the first shipments that are going to happen.

All right. Anything else, Christophe?

No. I think it's...

All covered? Okay. Maybe this one could be -- first off, Ron, there's a question on what's the implication on 3D NAND in litho. Do you see the litho intensity continue to scale there? Weren't sure scaling layer. So I assume the answer would be yes, and we showed 10% from Roger node on node, so...

Yes. So for us, effectively, what you see is the 3D NAND. And also, that's part of I think also the modeling that we -- the lack of insight in terms of what the customers are doing. Actually, we see that the content there in terms of litho has been increasing, particularly if you look to the KRF side. And actually, we expect that to -- well, probably that -- let's say, the speed that it has been increasing probably is going to stabilize will be lower. But certainly, it will grow over time. So the day is there, the amount of layers increasing. Yes, will have also a positive effect on the litho side.

Okay. I have -- maybe we have time, I think, for one last question. This is kind of a -- it's a longer term. The question was the smallest node in the presentation -- this is maybe a good finishing one. The smallest node in the presentation was 0.7 nanometers, somewhere far in the future. How far can you scale down with multiple patterning on High-NA EUV? And what will be needed once High-NA EUV has reached its limit somewhere in the 2030s?

Yes. I'd like to start with connecting with Ron just said about [ VNAND ]. When VNAND started, we thought this is a little intensity and it's not more or less. What turns out, that depending on the process integration, the cost of the customer may decide to put the logic under the way, increasing litho and not only increase it only make also more critical. And the aspect ratio of the process tools is [ little ], so you have to restart litho. So we have seen a recent boost that some customers of our litho intensity and NAND because of the different process integration. And given you're scaling up to close to 1,000 layers has been published by some will drive it. Now when you talk about 1 nanometers, 0.7 nanometer, 2 nanometers, those are marketing nodes. Those are -- I did not make this probably too explicit, but the presentation, I showed the gate pitch, and I showed node name. I showed the node name going way more faster down than the pitch. So I think how far could litho go down, I still think we will -- are going to make the prediction that we will even use EUV over time in double patterning node. And once that's the case, you could ask yourself, is there a need for simplifying again the process way according to the same logic we're on. And today, in our pipeline, and that is based on the innovation we are developing today in High-NA, we see opportunities to extend High-NA to higher levels to higher NA levels, we could even make cost-effective EUV tools with the technology, which allows us to simplify the process of the customer. So I think the question becomes actually not can we do a ton size kind of imaging, but we are becoming more and more -- they're enabled for customers to keep the complexity of the process in check and keeping the cost in check. And that in itself is a major innovation and therefore -- which we'll likely see let's say, months High-NA is maturing, that we will get more and more -- how could you continue to simplify and what tool specification is. It's not very likely we'll leave the EUV wavelength, but we're still not totally the end of the aperture, but we have to be very careful. Continue even more so than in the past, balancing cost performance, the cost performance equation which already Ron is doing as we speak.

Yes. All right. Thank you all. I think that wraps us up against our time here. I think I would like to tell the -- everyone out here that we -- whatever questions you did not get answered, if you have more questions, please contact the IR team, and we'll get back with you on that front to address any questions that will follow. We realize there's a lot to digest. It will take some time. And so we can follow up over the coming weeks and months as well. We also have a survey. We'd like to get, again, feedback in terms of how we can improve this event. So we'd appreciate your response to surveys as we submit them. I think with that, I would like to formally close the Q&A session and today's Investor Day event. On behalf of ASML, I would like to thank you all for joining today. Look forward to seeing you all in person soon. Thank you.