ASML Holding N.V. (ASML) Earnings Call Transcript & Summary

Good afternoon, everyone. I'm Krish Sankar from Cowen. I'm the covering analyst for ASML. We have Pete Convertito from ASML here today for our fireside chat discussion. Pete is going to give a brief overview of the results, and then we'll jump into Q&A. Pete, go ahead.

Thanks, Krish. Good afternoon, everybody. Good to see everybody face-to-face after a long time. So we had our first quarter earnings back in April, good results, EUR 3.5 billion with 49% gross margin and EUR 1.2 billion in installed base management revenue. Did EUR 7 billion in bookings, including write a few EUV and even a few High-NA EUV tools in there. So good quarter, came in as expected. We guided our Q2 to EUR 5.1 billion to EUR 5.3 billion, 49% to 50% gross margin. Again, about EUR 1.2 billion in installed base revenue is what we expect. We reiterated our expectations on the year of about 20% growth on the top line, with EUV up 25% over last year, EPV up about 20%. Installed base management, we expect to be up about 10%. On the markets, we expect Memory to be up about 25% year-over-year and Logic to be up about 20%. In terms of gross margins, we expect gross margins to grow towards [ 50% - 52% ] for the year. So strong quarter or solid quarter, I should say, for first quarter and good growth for the second quarter.

Got it. And I think the other interesting thing that came out was a revision to your long-term targets for 2025. I think the original communication was probably 70 EUV units and 375 deep UV and it looks like that's being stepped up to 90 EUV and 600 deep UV. So can you just throw some color on that? And my understanding is that's actually more capacity versus demand for 2025, right?

Yes. I mean, as everyone knows, we're in a strong demand environment right now where we're undershipping to demand by about 40% on deep UV units. And in light of these constraints, our customers are giving a bit more longer-term visibility into their demand ramps. So that gives us confidence to up our capacity to the numbers you talked about. So 600 deep UV units by 2025, 90 EUV units by 2025. And we said 20 High-NA units in the midterm, I think beyond 2025, probably more like 2027. We didn't update our model for 2025. We'll do that at an Investor Day that we announced last week that will occur in the Netherlands on November 11. So we asked our supply chain to go and look at enabling that capacity, what it takes to do it. And in November, we'll give an update around where we stand on that and what that means for the longer-term model for 2025 and beyond. So don't just take those numbers and put an ASP across it and think that's the 2025 plan. But those capacity is what we think we need for, again, 2025 and beyond to serve the market. And again, the driver around that was better visibility by our customers. And I'd say differences in demand from when we modeled 2025 back in our Investor Day last year, we're really around 5 areas. One being tech sovereignty, certainly, we are aware of tech sovereignty last year. However, there's a bit more solidified plans as to what they're going to be putting in those fabs when they're going to be ramping and what equipment they need. So we have better visibility of that, that has changed a bit since last year, and we'll model that in when we talk in November. Die sizes being a bit larger. So we're probably a bit conservative on our modeling of die sizes for our last Investor Day, both in leading edge and mature leading edge. They're doing a bit bigger devices on some of these for energy efficiency reasons. Trailing edge, things like CMOS image sensors are probably a bit -- growing a bit larger than what we had modeled earlier, which means more silicon for the same number of devices. Just overall higher CAGR of -- in the semi industry than what we had modeled last year. And then also, mature market. So we had modeled growth in the mature market, but it's a bit stronger than what we're looking at, driven by things like increased distributed compute, edge compute, things that are requiring more microcontrollers, power devices, analog devices. So we see higher growth in that than what we had earlier anticipated. And lastly, non-silicon applications that are starting to use IC-type manufacturing processes. I think AR/VR goggles and glasses that there's a device in there that if some of these projections goes, as they say, could drive quite a bit of -- so those are kind of what are different since, since last year, and we'll talk more about that at our Investor Day in November and what that means for the long term.

So Pete, can you just help us understand what the lead times are today for EUV and deep UV and what they were like 6 or 9?

Yes. So in the past, our EUV was -- we're typically running 12 to 18 months. You're probably 2 years right now. And we're constrained mostly by optics. I mean we can do 55 EUV tools this year. We've guided 60-plus next year. We have the cycle time comes down beyond 60 means. But right now, we're getting by optics here. Yes. So those are the lead times on EV. Deep UV, they've typically been 6 to 9 months, but we're -- again, we're running at full capacity and undersupplying to that market need to the tune of 40%. So you're probably second half of next year, if you put an order in for -- that didn't have a forecast.

Got it. So I mean, it seems like on the EUV, which is leading edge, things are going to be pretty fine. That's where all the government money is going, a lot of demand. I think investors worry about the lagging edge, which is more deep UV. I'm curious in the past cycles, when it is like 9-month lead time, how did customers react when there's a semi downturn? How do you think they'll react this time, assuming now the lead time is like 1.5 years, let's say, argument say '23 is a down year for mature node semis. What do you think happens to your deep UV number?

Yes. So certainly, we've always been vocal that we're in a cyclical industry. They're much less cyclical than they've been in the past. On the mature nodes, I think the perception out there is that some of this is driven by underinvestment through the pandemic and the need for catch-up. And certainly, there's a bit of that. But we think there's a secular driver in the mature market that's enabled by high-performance compute. So advanced logic, high-performance compute, 5G has enabled edge compute, distributed compute. That's requiring a lot more, again, microcontrollers, analog devices, power devices, sensors, that has a secular growth element to it in the mature market. And some people -- a lot of people get concerned about double forecasting or double ordering in that mature market. And I think Peter Wennink, our CEO; and Roger Dassen, our CFO, have acknowledged, yes, there's probably a bit of that. But maybe it's on a unit basis 10% or so. We're undersupplying by 40%. So you'd have to have another pullback of 35% to kind of affect like the top line. And we really think this is where we need to be longer term in the deep UV area. It's going to be more heavily weighted towards dried tools than immersion tools. So we're talking EUR 5 million to EUR 10 million tools a piece versus EUR 50 million to EUR 60 million. So we would obviously never say there's not going to be a cycle, but we -- and we think there's a cyclical element there, but there's certainly a longer secular that require this type of [ comp. ]

Got it. And then talking about deep UV, another big driver for deep UV seems to be China. And clearly, it's a combination of the [ snicks ] of the world, YMTCs, whatever it is and the long tail of IoT, smaller customers. How do you handicap the China risk? I mean, it feels like there's a lot of purchasing happening there, but no one really knows the end demand because many of them are not even producing valid chips or pretty low yields. How do you like handicap that China demand when you build your deep UV forecast?

Yes. I mean, certainly, China has been a big -- a good part of our -- significant part of our business over the last couple of years. The percentage was a bit artificially high in the first quarter because our fast shipment, which delayed revenue rec affected EUV, not deep UV because we can't ship deep UV -- or EUV to China. But certainly, China is producing product, logic and a bit in memory. So they're putting in real capacity. And sure, there's probably some lagging edge that could be a bit redundant. But they're growing. I'd say -- we'd say roughly the normal rate. I mean, they were about EUR 1.8 billion of our revenue in service and equipment business last year, and it grows a bit this year. I think that -- I mean, the only thing we're prevented from shipping to China because we don't have an export license granted by the Dutch government is EUV, but other than that, we're...

Got it. Got it. And then on the deep UV side, when I look at your memory exposure, it's obviously more skewed towards DRAM, not NAND. I mean, forget the EUV for DRAM, that's still pretty early stages, they seem to be buying a lot of deep UV. But given that your lead times for deep UV are now like almost 1.5 years, it seems like when you look at other front-end semi-cap companies, you have like a 1-plus year lead time for DRAM, and they're not getting the tools they want. Obviously, the DRAM companies are a little frustrated, but in a way it's a lessening because the supply hasn't coming online has fast. So from your vantage point, like if a DRAM company places an order today for deep UV, when do you realistically think that translates into -- because I think there's a lag time from installation, processing, et cetera?

Well, so keep in mind, we're -- while we talk about bookings, we're not an order-driven company. We work off a volume purchase agreement. So a lot of what we're shipping this year and even going to ship next year was forecasted in volume purchase agreements for leading-edge customers. We see memory growing 25% this year. And some of that's for technology transition, that would be more on the EUV side than the deep UV, but certainly some of the EUV is for capacity. And you still need quite a bit of deep UV tools for capacity in both DRAM and NAND. Certainly, EUV is critical layers in DRAM at a couple of customers, but you certainly need quite a bit of deep UV. But if you didn't have a forecast and you just came with an order for a deep UV tool, it would be mid next year, that can happen.

Got it. I want to pause, see if anyone had any questions for Pete? So I'll just continue on. So the next one, I just wanted to check in on the EUV side. Clearly, Pat coming to Intel has been a good blessing in disguise for ASML because they're very aggressive on EUV, going ahead with High-NA. Is Intel the only one who actually has plans to put High-NA in volume production? I understand you have orders from Memory companies. But like does TSM has like concrete plants, are they still evaluating, how to think about High-NA proliferation vis-a-vis the fact that your newest High-NA tool, it's EUR 400 million a piece, which is like ridiculously expensive.

Well, so yes, good question. I mean, I can't talk to customer specifics, but obviously, Intel has been quite vocal on their plans to bring High-NA into production. We already had orders from multiple customers back from a couple of years ago when we launched the High-NA program. End of last year into last quarter and even right around our earnings, we got orders for the 5200, which is our -- will be the first high-volume platform for High-NA, the early tools were 5000. We'll start shipping those 5000s late 2023. And then the 5200s will come in like 2025 time frame. But to your point, we have orders from multiple logic and Memory customers. And people -- our pricing is value-based pricing. So we're selling low-NA EUV tools now for EUR 160 million a piece, rough ASP. We'll go to an e-version next year that will -- it'll probably be north of EUR 185 million with the value it provides and the productivity and overlay improvements. And then there'll be another step-up in 2025, when we come out with the F tool, and you can see that road map at our Investor Day material that we did back in September for EUV. In that same time frame, so there'll be multipass patterning required for some layers with EUV in that time frame. So if you need 2 tools there, then you're talking nearly EUR 400 million just for the EUV tools for 1 layer, if you have to do multipass patterning. It's complex that the yields aren't as good as single exposure, plus you need depth and etch as part of the patterning with that. So if you're talking a High-NA tool for that layer that's we've talked about high 3s, EUR 375 million plus. You're at, call it, net neutral on the litho capital cost. It's one tool, it's single exposed. It's better yield, and you don't need the additional depth. So you keep -- we're keeping the customers on all cost for function. While the price tags downsize the values. And customers wouldn't be ordering in it.

Got it.

But I'd say, Intel has been the most vocal. And they gave a nice presentation at SPIE where they talked about things that have already been learned by the industry on Low-NA EUV that are obviously portable over to High-NA. So the transition from Low-NA to High-NA will be easier for the industry than from deep UV to EUV because things like the resists, reticles, pellicles, that ecosystem has already been -- reliability of the tools has already been flushed out a bit, just an evolution time.

I have 2 other questions on EUV-related. One is TSMC has been vocal about going from 3 to 3E lowering the number of EUV layers. Is that a trend you think that's going to pick up, which would be at the margin slightly negative for you because the number of EUV layers is low? And then the second one is I want to touch upon on actinic.

Yes, it's a good question. Yes, obviously, I can't talk to customer specifics on layers, but I'd say this is not something out of the ordinary. We talk about layers from node to node basically grow -- but roughly EUV layers are roughly doubling from 5-nanometer to the 3-nanometer node. You always have these subnodes that they look to optimize the process, whether it be reduce a layer or so. And also, it helps with ease of transition from customers from an older node to the newer node. But you get it for the efficiency, better power performance. So nothing that is unexpected. But from, I'd say, the aggregate of a 5-nanometer node to the aggregate of a 3-nanometer node, we see roughly a doubling of EUV layers. That's that.

And then on actinic, it seems like so far, Intel, seems to be the main customer for that. I understand it doesn't make sense for DRAM. You think like TSM or the foundry guys start doing more or is it going to be more leading edge [ logical ].

Yes. So what drives actinic is pellicle used on the mask. And the pellicle is a membrane that's used to protect the reticle of the mask from contamination. Basically, if a particle falls on the mask, you're going to print that defect on the wafer. And pellicles have always been used in deep UV. And the inspection for reticles on deep UV can see through that pellicle material. On EUV, if you use that same inspection, a visible wavelength inspection, you can't see through that pellicle. So that's where that -- this actinic inspection comes in. But your choice is either to inspect the mask, inspect the pellicle, put it in place, print a sample wafer or what's called print check to see if you have any killer defects that repeat on all the fields because keep in mind, we only print an exposure area about the size of a postage. So if you have a killer defect on there, you'll see it repeating in all the fields. If it's not there, you're off and running and you have a clean pellicle. But for someone like a microprocessor or foundry or GPU producer, those are big devices, which make up -- maybe only get 1 or 2 of those in our scanner field, and they're high value, several hundred dollars. So if you get 1 killer defect in there, you could lose the whole wafer or 50% of your -- if you're a memory guy, to your point, you're putting 10 devices in a scanner field. If you got a killer defect in say, a corner of the mask, you'll affect 1 device in there and to the wafer. And even there, you could probably turn to sell off and still sell that device. So it's less critical in memory than in these bigger devices, high-value device. So certainly, Intel wants to have the pellicle and needs that actinic inspection for it. Memory they need isn't so urgent. A foundry could be on some processes, they use it. In some process, they don't. But the pellicle, the efficiency is there, as such, meaning the transmission of light through it is such that, that makes it economical to use, but then you still need to either do print check or have this actinic inspections. That will drive them all.

On the actinic side, it seems like the only tool that can inspect it today is the laser tech tool. Do you -- would it make sense for you guys to develop it in-house? Or do you think you just leave it to the laser techs and the KLAs of the world to figure it out?

Yes. I mean the -- it doesn't need us to invest in -- laser tech is certainly developing it. LA is looking at it, and there's others that are developing. The size has a mask inspection tool for when you're actually making the mask that also can look at it a bit. So there's a number of alternatives out there. There's not a need for us.

Maybe switching a little bit to the metrology side of the business. Can you just give an update on the e-beam, the Hermes' e-beam business, at the multi-beam, kind of like how is the traction going, road map for option.

Sure. So we delivered the first 3x3 beam eScan 1000 tools late in 2020 into 2021. Those are really evaluation tools to get out to the customers, to use them, give us feedback. And when we came out with the eScan 1100, that's a 5x5 beam tool. We delivered that late last year. It's been in installation, being installed now, it might even completely installed. And that's on a what we would call a higher volume manufacturing platform. So we'll ship several of those this year. Obviously, customers need to evaluate them. It takes a while for you to make that decision on inserting into high-volume manufacturing. If you look at our YieldStar, it was a year or so after we came out with that overlay tool before it really gained traction and started generating revenue. But we expect to start generating revenue probably next year. And we have a road map for even more beams on -- you could imagine it's easily insertable into areas like voltage contrast where single beam, e-beam already has a good foothold there for looking to see if you've cleared these deep contact holes in 3D NAND and DRAM. So it's easily portable over that because it's higher productivity. And then basically, how we execute on that productivity road map will dictate how it does for pattern wafer.

Got it. Do you think realistically e-beam will ever replace optical? Or do you think it will never happen?

We think there's a case for it. The whole driver behind it is the extendability of the resolution of e-beam. The drawback that has kept it in R&D has been the productivity with multi-beam, that's where you start to get the productivity up. And certainly, they're extending the capabilities of brightfield inspection with a lot of software and AI, but we think the extendability of the resolution capability of multi-beam -- of e-beam along with the productivity gains that we'll get with multi-beam will get it to a point where for layers, like EUV-type of layers. It will start to come into play for pattern wafer inspection. And then again, depending upon how high we get the productivity up, will dictate whether it could start to take a...

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Great question. I mean the reason we did it -- we made the acquisition was not because we wanted to get into the inspection business, but for the whole holistic lithography package that we offer, which is the scanner, the control software and on overlay, it's been the YieldStar overlay metrology that with that in-line metrology, we can early detect any drifts and real-time control that. Same thing was the reason we went to the e-beam and multi-beam is to control that patterning and potential drifts of that patterning and edge placement error and things like that. Multi-beam or e-beam had the resolution, but needed the throughput. But to tie that in with our holistic software, be able to control real time, the tool was the driver to do. And that's certainly a differentiator for us.

And on the YieldStar holistic litho stuff, you guys did a great job in getting into YieldStar and the Brine software by effectively kicking out outside metrology from the litho tool. And now you're trying to do that with EUV, too. Do you think that's an ongoing trend across? Or do you think it's only true for litho because you already have like almost like 90-plus person market share. So customers have to use ASML litho tool to make sense to use the ASML die metrology, but do you think you're seeing more and more insitu metrology with a process tool?

Yes. I mean -- the reason we did the YieldStar and was again, our CTO realized a long time ago that these tools are big hunks of glass and metal, and they vary with temperature and pressure. And even if we made the perfect tool, it's only going to stay perfect for so long as you start pumping high power light through it. So if you relied on the overlay metrology and inspection, which is done on a statistical sample of wafer somewhere down the line, you could process a lot of wafers before you call it the error. So we were looking to have an in-line metrology tool to your point because it's -- things are going to drift faster and you need to be able to control it real time. So the modeling software is an important part of that because it models the whole system and optical column and it knows what's going in and what should come out. And if it's not coming out the way it should, what knobs to turn. But you need the measurement capability, which is where YieldStar came in and where the HMI or the e-beam will come in. We didn't want to be a metrology company. We're an outsourced company. So we went to people that know how to do it best and we said, "Hey, this is what we want to do and how fast is your tool and at that time 50 wafers per hour. And we had a road map out to 300 wafers per hour, and we couldn't get anyone to sign up for that type. So we had to do it ourselves. Now it took a while. And now we have a tool that's in line. But to your point, I think you're going to see more in-line processing. But again, the differentiator is having that software that allows you to, knows what knobs to turn to control at real time.

All right. I think we're kind of out of time. Thank you very much, Pete, for your time. Really appreciate it.

Thank you. Appreciate it. Look forward to seeing you in November at the Investor Day.