Atomera Incorporated (ATOM) Earnings Call Transcript & Summary

Hello, everyone, and welcome to Atomera's Second Quarter 2026 Update Call. I'd like to remind everyone that this call and webinar are being recorded, and a replay will be available on Atomera's IR website for 1 year. I'm Mike Bishop with the company's Investor Relations. As in prior quarters, we are using Zoom, and we will follow traditional format. [Operator Instructions] We will open with prepared remarks from Scott Bibaud, Atomera's President and CEO; and Francis Laurencio, Atomera's CFO. Then we will open the call to questions. If you are joining by telephone, you may follow a slide presentation to accompany our remarks on the Events and Presentations section of our Investor Relations page on our website. Before we begin, I would like to remind everyone that during today's call, we will make forward-looking statements. These forward statements, whether in prepared remarks or during the Q&A, are subject to risks and uncertainties. These risks and uncertainties are detailed in the Risk Factors sections of our filings with the Securities and Exchange Commission, specifically in the forms -- in the company's annual report on Form 10-K filed with the SEC on February 24, 2026. Except as otherwise required by federal securities laws, Atomera disclaims any obligations to update or make revisions to such forward-looking statements contained herein or elsewhere to reflect changes in expectations with regards to those events, conditions and circumstances. Also, please note, during this call, we will be discussing non-GAAP financial measures as defined by SEC Regulation G. Reconciliations of these non-GAAP financial measures to the most directly comparable GAAP measures are included in today's press release, which is posted on our website. Now I would like to turn the call over to our President and CEO, Scott Bibaud. Go ahead, Scott.

Thanks, Mike, and good afternoon, everyone. Q2 was a quarter of real momentum. Our customer engagements advanced across each of our target markets. We've had promising signs of new markets developing and in GaN, we turned a technical breakthrough into the early stages of a genuine commercial pipeline. Today, I'll move through gate-all-around, our broader customer activity, the growing pull we're seeing in memory, and then I'll spend real time on GaN, where I believe we may be witnessing the opening of a significantly new market for Atomera. Let me start with gate-all-around. By now, you all know why this technology transition is so important. So I'll go straight to the news. We continue to work with 2 of the 4 players in this space. And this quarter, we passed a significant milestone with 1 of the 2 active gate-all-around customers, opening the door to further work on our unique silicon structures. These customers typically ask for a sequence of demonstrations before they'll accept a new material into their process flow. So clearing this stage is a meaningful step rather than a formality. It directly answers the manufacturability questions this customer had put in front of us. We remain in active discussions with the other 2 of our 4 target GAA customers, and our strategic partner continues to provide both the advanced test infrastructure and the ecosystem credibility that enables us to get in the door and helps us to stay there. Memory is an area where interest is clearly accelerating. The large memory manufacturers are under real pressure to add both capacity and performance, and they have the budgets to evaluate options that can help them get there. Up until recently, we had significant interest from DRAM customers focused on our value proposition for planar periphery enhancements. Then suddenly, our customers' direction changed. The major underlying factor was that AI demand accelerated and pushed DRAM manufacturers to the vertical scaling era, including 4F2 and 3D DRAM and other advanced architectures. We can be confident from our interactions, however, that the technical merit of our value proposition for planar periphery is strong. Today, we've established a new value proposition for 4F2 DRAM validated through discussions with multiple customers. We have shown that an MST starting wafer enables a vertical DRAM access transistor to be built using a next-generation DRAM fabrication process that is much cheaper than one of the most -- that most of the DRAM industry is currently pursuing. Our new concept solves fundamental device challenges in 4F2 while offering significant cost savings by leveraging MST's precise doping profile control capabilities. In addition to meeting with customers, we have completed a TCAD simulation study demonstrating its feasibility, and the results have been accepted to be presented at an IEEE conference in September. Traditionally, the technology in NAND flash memory periphery circuit have lagged far behind DRAM, even though NAND memory cells themselves moved to 3D structures many years ago. In the history of Atomera, we have never established a serious value proposition for flash memory. However, that situation may be changing because in the last few weeks, we have learned from a major NAND supplier that AI is now pushing NAND to the point that they need the planar periphery boost that MST can provide. We have spent the last 5 years perfecting this value proposition for DRAM, and now it is applicable to NAND. If adopted by NAND flash manufacturers, this more than doubles the TAM for MST, which would obviously be very commercially significant. Turning to the rest of our pipeline. Our large IDM customer program continues to progress according to plan. We're now at a stage where new device test data is coming in even as the next batch of experiments gets underway. Development efforts are moving fast, and our teams are working closely together. We are also working with other companies and engagements in power and our TrenchFET and HBT development continues to advance, aimed squarely at the efficiency and high-frequency demands emerging from AI data centers. In RF-SOI, wafers are still running with our second JDA partner, and we remain confident they will replicate the positive results we've demonstrated on other customer silicon. Internally, our work on a high-throughput manufacturing process for RF-SOI, where the substrate supply chain is crucial is also going well and may be applicable to multiple other applications. RF manufacturers have long relied on the characteristics of RF-SOI substrates for switch and LNA performance, but they're also interested in future designs using gallium nitride due to its significant performance advantages, including the potential for fully integrated RF front ends, including power amplifiers. Unfortunately, due to silicon substrate parasitics, GaN RF development has been mostly limited to GaN-on-silicon carbide, which is a very expensive specialty starting wafer, which brings me to the exciting news regarding their preferred starting material, GaN-on-silicon. In our May update call, we shared how MST could help solve parasitic channel problems in GaN-on-silicon, but we hadn't gotten the RF test results that could completely illustrate MST's effect. Later that month, performance data finally arrived, and we announced a technical breakthrough. MST makes GaN-on-silicon for RF devices commercially attractive. Our characterization partner, Incize, has now delivered RF data for MST enabling GaN-on-silicon that is frankly outstanding. The devices deliver effectively lossless RF together with outstanding harmonic distortion performance, leading to exceptional linearity. At the benchmark drive level, linearity is roughly 1,000x better than the GaN-on-silicon reference, and that improvement remains 2 to 3 orders of magnitude across the full suite of power. We know of no other GaN-on-silicon substrate that can duplicate these findings. Just as important, these results approach the linearity and loss figures of advanced trap-rich RF-SOI, the technology RF designers typically reach for when they need this class of performance. Our partners at Incize independently confirm these benefits on their own world-class baseline, which is exactly the kind of third-party validation customers appreciate. For more details on our GaN-on-silicon test results, please see the white paper on our website. In June, we took this data to IMS, the International Microwave Symposium, and the results were terrific. Our announcement generated real enthusiasm on the show floor. And as a direct result, we are now working with several new potential customers who want to evaluate MST GaN-on-silicon in their own designs. Here's why this matters strategically. Because our GaN-on-silicon results are now approaching RF-SOI class performance, but on a low-cost silicon substrate and with the inherent power and frequency headroom that GaN provides, we believe some designs that would traditionally be built in RF-SOI could instead move to GaN-on-silicon. That would be a meaningful shift in how RF front-end designs get built. And MST's performance may well be the catalyst that sets it in motion. If new RF design activity begins migrating towards GaN-on-silicon, Atomera would be positioned right at the start of a new high-growth market, and it's worth underscoring that MST is the enabler on both sides of that shift. So whichever path the customer chooses, Atomera benefits. To summarize, we cleared a key gate-all-around milestone, established a new next-gen value proposition for DRAM, opened a new front in memory with NAND, kept our pipeline moving across power and RF-SOI and turned our GaN breakthrough into hard RF performance data, real industry enthusiasm and new customers with the potential to seed in an entirely new RF market. This is an exciting time to be at Atomera. With that, I'll turn the call over to our CFO, Frank Laurencio, to review our financials.

Thank you, Scott. At the close of the market today, we issued a press release announcing our results for the second quarter of 2026. This slide shows our summary financials. Revenue in the second quarter was $158,000, consisting of fees for wafer deliveries to customers, primarily to our large IDM customer. Our GAAP net loss for the second quarter of 2026 was $6.3 million or $0.17 per share compared to a net loss of $5 million, also $0.17 per share in the second quarter of 2025. On a non-GAAP basis, our loss for the second quarter was $5 million compared to a loss of $4 million in the second quarter of 2025. GAAP operating expenses were $6.9 million in the second quarter of 2026, an increase of approximately $1.7 million from $5.2 million in the second quarter of 2025. Stock-based compensation, which is excluded from our non-GAAP results, increased by approximately $463,000 year-over-year and was $1.7 million in the second quarter of 2026 compared to $1.3 million in Q2 2025. In the second quarter of 2026, as compared to the prior year period, non-GAAP R&D expenses increased by $188,000, G&A expenses increased by $828,000 and sales and marketing expenses increased by $225,000. The increase in sales and marketing was mainly due to new executive hires in Q4 2025 and Q1 2026. Turning to our sequential results. Second quarter GAAP operating expenses of $6.9 million compared to $6.2 million in the first quarter of 2026. On a non-GAAP basis, operating expenses increased sequentially by $350,000 to $5.1 million in the second quarter from $4.8 million in Q1, primarily reflecting higher G&A expense, offset partly by lower R&D expenses. These sequential fluctuations largely reflected timing of expenses for IP legal costs in G&A, which were heavier in Q2 and outsourced metrology activity in R&D, which was more concentrated in Q1. Our balance of cash, cash equivalents and short-term investments on June 30, 2026, was $38.4 million compared to $41.1 million on March 31, 2026. We used $3.9 million of cash in operating activities in Q2 compared to $4.8 million in Q1 and $3.5 million in Q2 of last year. We did not sell any shares under our ATM during the second quarter of 2026. As of June 30, 2026, we had 39 million shares outstanding. We believe our current cash, which includes $23.6 million of net proceeds from the registered direct offering we closed in Q1 puts us in a strong position to execute on the opportunities ahead of us. And we will continue to be disciplined about controlling costs. However, we are experiencing cost increases, particularly in our outsourced engineering work. The recent very rapid growth in the semiconductor industry has tightened supply and our cost of tool leases, metrology and device fabrication are going up. On our last 2 calls, I said we expected 2026 annual non-GAAP operating expense to be approximately $18.5 million. We budget for a range of plus or minus $250,000 around that number, and we now expect that we will end the year in the high end of that range. With that, let me turn the call back over to Scott for a few summary remarks before we open the call up to questions. Scott?

Thanks, Frank. Before we take questions, I want to thank our employees, our customers and our shareholders for their continued support. We're excited about the progress we made this quarter, clearing a key GAA milestone, broadening our memory opportunity into NAND and turning our GaN breakthrough into real RF results. We remain focused on translating our growing body of simulation and customer silicon evidence into commercial agreements that drive long-term repeatable revenue and a strong sustainable business. And we're happy to have you along for the ride. Mike, we will now take questions.

Thank you, Scott. [Operator Instructions] Right now, our first question comes from Richard Shannon of Craig-Hallum.

Let me ask a few questions here. A lot of interesting comments here on your prepared remarks, Scott, let me jump into those here. First on gate-all-around here. You're characterizing the -- and please correct my language here. I'd probably get a good transcription of exactly what you said, but I think you essentially said that one of these customers has accepted a new material into their ecosystem here. Can you kind of convey the importance and difficulty of this? Have you seen -- can you compare it to other dynamics of a similar type in the past in the advanced logic space here? And then how would you describe the next steps here? How many other steps could you describe them? What has a customer told you about what they expect to do and to see from you next?

Okay. Great. Let me figure out any language from your kind of quasi-transcription there. So what we talked about this time is that we've cleared a hurdle with our gate-all-around customers where they have -- well, okay, I'm glad we're actually showing a picture of a gate-all-around structure here, and it shows you just how complicated it is. And what we expect that gate-all-around customers will do is they will ask us to prove that we can deposit MST in a structure like this and both physically and have positive electrical results on that over time. And one of the milestones that we passed this quarter is that we did actually show one of those steps that I just talked about. They'll ask us to do a few more. But at some point, when we've deposited our technology into one of their structures, the next step for them is to take it into their own fab and deposit it on their own structure. They'll keep that secret from us. Those are the very, very critical IP that they won't share with us. And so in order to do that, they would need to take a license from us and then install it in their fab. So I think hopefully, that's a clear example of exactly where we are with them and what's left to be done before they would license it and start working towards production. The other thing you asked is how is that comparable to how other materials are introduced, right?

Yes.

It's unusual to have a material introduced by a third party like us, but it is more common for a company like, let's say, Applied Materials or ASM or Lam to introduce a new material to a customer. So they might say, okay, we know you're having this problem here. And we figured out how you can use our tool and deposit some material in such a way that we think it will solve it for you. And the way that an OEM typically approaches that is that they talk about it with the customer and the customer asked them to do the same thing they're asking us to do. We need to see a demonstration of how that will work. And they will demonstrate it in their own labs. And then what frequently happens is that they'll go to one of these OEMs and say, okay, we need you to install a tool, a multimillion dollar tool in our factory so that we can test it in our own flow. And then if we like what we see, then we'll buy the tool from you and we'll buy more of them when we go to production. And so that's a very typical next step. You can see those advantages for the equipment OEM, they got a real good chance to sell more tools. And for the customer, the advantage is that they get to try it out without having a commitment. We don't quite have that flexibility. So the next step for them will be to license from us, install it on one of their tools in their own fab and do that testing.

Okay. So Scott, does that mean you're currently in some level of negotiation with the end customer here? Or do you expect that to happen -- start to happen soon?

Yes. I mean we've been in discussions with them about what that would imply and what our license terms would look like since we started working with them. And as we get close to the end of this, then it will accelerate so that we can close the deal. But we've already got kind of terms on the table.

Okay. I'm assuming you would expect this to not be a short sales cycle and unclear exactly how long this will take. Is that a fair conclusion? Or any perspective you can offer on time frame and chances of success there?

Yes. I think so far, we've passed a lot of hurdles with them and done some, I think, pretty impressive work. And I think if we can complete this cycle and get good electrical results out of that, then we would move on to discussions about installing in the next step. That could happen -- it's not going to happen in the next 2 months, but it could actually, if things went really well happen as early as over the course of late this year or a little beyond. Now the other thing that could happen is that we get the results and they say, oh, these results are good, but they're not great. We need to do another round to prove because something went wrong, and we have to fix it and try again, and that could stretch it out by another 9 months or so. And that's why we're very hesitant to ever predict exactly when we get around to closing those deals.

Always makes sense to be safe there. So that makes a lot of sense. Let's step over to the DRAM space here. Just want to make sure I'm interpreting your comments correctly, Scott, here. It sounds like the technology transition process here within the DRAM space has probably restarted an investigation and testing cycle here. So we're kind of resetting a little bit here. Is that a fair conclusion of what I heard?

In DRAM, yes, we had -- the big opportunity for us in DRAM was in the periphery circuits. DRAMs have -- you could generally break them down to 2 parts. There's the memory cell, which is very, very advanced and the periphery circuits are analog-like circuits that tended to lag the technology node of the memory cells by quite a bit. And one of the reasons they lag it so much is because they needed to contend with variability across a wide set of process conditions and across the whole wafer. And that's one of the things that MST could help to solve, and we have proven that and had a bunch of papers on it and worked with a number of customers on that. But what's happened is the emphasis in DRAM manufacturers has moved from advancing just regular DRAM to the next generation, but now starting to think a lot more about how can they actually solve the big capacity and performance issues that are in front of them. And it's most likely that their next steps would go to 3D because DRAMs right now are still planar on a single plane. So they're talking about 3D structures. The first 3D structure they would build is something they call 4F2. And in 4F2, as I mentioned on my remarks, we have some very compelling technology where MST through our doping control capabilities can really help them to simplify their manufacturing process and make it much more viable to make these things at a cost-effective manner. And so we presented that to a few of them. They agree with the concept, and so we'll start moving further ahead with them in the near future.

Okay. Fair enough. On the DRAM space. Now it did sound like if I heard your comments right, you've made some great progress on the planar again, my transcription of your comments probably isn't perfect here, but something regarding the planar mechanism within DRAM here that can be applied to the NAND flash space here. So it sounds like that work, while DRAM may be kind of resetting here, it's actually a great dynamic here in the NAND flash. Am I interpreting that correctly?

Yes, exactly. Yes. In DRAM, we have -- as I mentioned earlier, we have a great technology for their planar periphery. And -- but in NAND, they never really cared that much about the planar periphery. They -- it wasn't a pressing issue for them, but now it's suddenly a pressing issue. They need to really amp up performance on the periphery. And so all that work that we've done for DRAM is now interesting to the guys in NAND flash, which is an entirely new TAM that we've never considered before because we didn't really think we have something to offer to the flash. As a matter of fact, I think you've asked me before, if there are any parts of the semiconductor market we didn't think we were applicable to, and I probably answered that was flash memory, we didn't see a path. But now we see a real path, and that's amazing. NAND actually manufactures more wafers per year than DRAM, although I think DRAM revenue is higher. But for us, where we're selling products based on wafer shipments, that's a really good opportunity.

Okay. Great. That is helpful on those topics. Let me touch on RF and GaN here, which is really interesting. Again, my transcription of your comments here about getting linearity 1,000x better than the GaN-on-silicon reference seems an amazing accomplishment. And I have never thought that anyone would consider using GaN-on-silicon as a replacement for RF-SOI. And I know that space well enough to know that it goes into a lot of cell phones. So are you basically saying that people are now considering using RF-on-silicon -- excuse me, GaN-on-silicon?

Well, there's no doubt if you've gone to technical conferences for RF-SOI for the last few years, they're all talking about how it's kind of reaching its maximum performance headroom that it can get to. And by that, they mean the high-frequency performance and the ability to handle higher powers. And they're looking at all kinds of different ways of trying to keep that road map going forward. But one of the most promising is GaN because GaN does handle high-frequency RF performance much better and high power. And what we have just demonstrated -- now, okay, but last call, we talked about how GaN-on-silicon carbide is what people have been using for RF in the past, but it's a very expensive substrate. It's specialty product. You're never going to start making fully integrated front end for mobile phones with that substrate. But GaN-on-silicon can be used to do that. It has the cost levels that you could do, but it was having problems with RF. And now we seem to have solved the RF problems and this data that I showed in the call here is actually a great example of some of the big benefits that we are getting. And I will point out that we -- at the end of May, we put out a white paper explaining how MST improves GaN-on-silicon. And then we did a press release based on getting new data, and we put that into our white paper. But this data I'm showing here is even newer data than what's in our white paper, showing how incredible the improvement in harmonic distortion is over a control GaN-on-silicon wafer.

Okay. It looks impressive from what I understand, which is probably only a small subset of what's really important here, but it seems like a very impressive achievement here. So...

One last statement because you had asked about RF-SOI designs. The one thing that RF-SOI has not been able to do is to support power amplifiers because it just didn't handle the high-power performance. But what you can see here in this data, especially in the lower plot is that our MST can handle -- I mean, a GaN-on-silicon enabled by MST can handle extremely high power levels. So then you could make a single design that's a fully integrated RF front end, including the switches and the LNA and the power amplifiers, and that's a key breakthrough.