eMemory Technology Inc. (3529) Earnings Call Transcript & Summary

Good afternoon, and welcome to eMemory's First Quarter 2024 Webcast Investor Conference. Joining us today is our Chairman, Dr. Charles Hsu; President, Mr. Michael Ho; Head of IR, Ms. Li-Jeng Chen; and the Director of the Finance Department, Ms. Teresa Kuo. The format of today's event will be as follows: first, eMemory's Chairman, Dr. Charles Hsu, will give an opening remark. Afterwards, President, Mr. Michael Ho, will summarize our operations, followed by our business outlook. Next, Dr. Charles Hsu will give a talk titled, Caliptra: Building a Silicon Root of Trust in Datacenters and Every Chip. Then we will conclude today's conference with a Q&A session, where our management team will be ready to answer your questions. [Operator Instructions] As a reminder, this conference is being recorded and a webcast replay will be available after the conference is finished. For more information, please visit the company's website under the Investor Relations section. As usual, before we begin, we would like to remind everyone that today's presentation may contain forward-looking statements, subject to the risk factors associated with the semiconductor and IP business. Please refer to the cautionary statement on Page 3 of today's presentation. Now I would like to give the floor over to eMemory's Chairman, Dr. Charles Hsu.

Okay. Good afternoon, everyone, and thank you for attending our conference call today. As we mentioned in previous quarters, our multiyear growth cycle has just begun. eMemory is a company dedicated to inventing semiconductor device technologies. We license these technologies to foundries and based on our technology, we design IPs which are then licensed to fabless customers. Each of our newly invented technologies take at least 5 to 10 years to commercialize. However, once successful, the resulting royalty can last for over 20 years. We are still receiving royalties from our first technology, NeoBit, which was licensed 20 years ago. Over the past 2 decades, once foundries and fabless adopt our technologies, they continue to use them for every following generation. Moreover, our technology and IP portfolios continue growing. We now offer not only OTP but also MTP, EE, Flash, RRAM, PUF, Secure OTP and PUFrt, which is Root of Trust and PUFcc, which is Crypto Coprocessor. The demand for each technology has been increasing, resulting in significant growth in our licensing fees. The corresponding royalties will increase greatly in the future. With expansion of the foundry capacity worldwide, both existing and new foundries continue to license our technologies. And the royalties for advanced processes or new technologies are much higher compared to the past. Therefore, we are very confident in our future continuous growth. Next, I will invite our President, Michael Ho, to share our first quarter performance and the future outlook. Thank you.

Good afternoon, everyone. Now let's begin with our 2024 first quarter financial results. The first quarter revenue was TWD 803 million, down 10.7% sequentially but up 20.2% year-over-year. Operating expenses were TWD 382 million, up 6.3% sequentially and 27.1% year-over-year. The increase in operating expenses is mainly due to the increase in employee and director bonuses as a result of increased net profit before tax. We allocated bonuses expenses each quarter as a percentage of net profit before tax, 15% for employees and 1.5% for directors. This quarter, there are foreign exchange gain in nonoperating income, leading to an increase in net profit before tax and nonrecurring increase in bonuses expenses. Operating income was TWD 421 million, with decrease of 22% sequentially but an increase of 14.6% year-over-year. Operating margin decreased by 7.6 percentage points sequentially and decreased by 2.6 percentage points year-over-year to 52.4%. Our net income amounting to TWD 431 million experienced an increase of 6.6% sequentially and 37.5% year-over-year. EPS for the quarter was TWD 5.77 and ROE was 53.2%. Now let's move on to the revenue contribution by licensing and royalty. Licensing in the first quarter accounted for 28.4% of the total revenue, down 16.6% sequentially but up 59.6% year-over-year. Royalties in the first quarter contributed 71.6% of the total revenue, decreasing 8.1% sequentially but increasing 9.5% year-over-year. Total revenue for the first quarter decreased by 10.7% compared to the previous quarter but increased by 20.2% compared to the previous year. With that, I will comment on our revenue contribution by specific IPs. For NeoBit, accounted for 20.9% of total licensing revenue in the first quarter, decreasing 33.5% sequentially but increasing 70% year-over-year. Its royalties accounted for 24.7% of total royalty, up 4% sequentially but down 11.1% year-over-year. For NeoFuse, accounted for 52.6% of total licensing revenue in the first quarter, up 2.3% sequentially and up 69.3% year-over-year. In terms of total royalty revenue, NeoFuse royalties decreased by 11.4% sequentially but increased by 17.4% year-over-year, accounting for 72.8% of total royalties. For PUF-based security IPs, contributed 8% of licensing revenue, decreasing 39% sequentially but increasing 10.2% year-over-year. Its royalties accounted for less than 1% of total royalties, up 15.9% compared to the previous quarter but down 59% compared to previous year. For MTP technology, accounted for 18.5% of the total licensing revenue, down 22.8% sequentially but up 53.7% year-over-year. Royalty from MTP decreased 12.2% sequentially but increased 64.7% year-over-year, accounted for 2.5% of total royalties. Now let's look at royalties for 8-inch and 12-inch wafers. For 8-inch wafers accounted for 42.8% of royalties, up 4% sequentially but down 0.2% year-over-year. For 12-inch wafers accounted for 57.2% of royalties, decreasing 15.4% sequentially but up 18.1% year-over. In total, 154 product tape-outs were completed in the first quarter. We will provide more information in the management report. In the next section, I will address our future outlook. For licensing revenues, due to strong demand from foundries and chip design customers for all of our technologies, the growth momentum of licensing revenue will continue to increase. For royalty revenues, we are beginning a multiyear growth cycle for royalties. Over the past 3 years, we have accumulated over 1,500 new tape-outs, which are entering mass production. From the first quarter royalty report, production for 22-, 28-nanometer and below has resulted in new royalty contribution from applications such as 6-nanometer DTV, 7-nanometer ADAS, 12-nanometer SSD controller and ISP as well as the 22-, 28-nanometer networking, switch and smart image processor. For specialty processes like high v in FinFET, BCD, embedded flash and emerging memory, we have the following development status. One, NeoFuse is developing toward FinFET in high v process for OLED DDI applications; two, RRAM is expanding into more processes; three, NeoFlash continue progressing in specialty process for automotive PMIC and MCU-related products. For advanced processes, one, NeoFuse has successfully qualified for the N5 automotive process with customer design in; two, PUFrt collaboration with CPU partners in 3-nanometer is progressing successfully. And regarding the business collaboration platform. For NVM and PUF-based technologies, expanding cooperation with all new foundries to license our technologies besides existing foundries. For security IPs, we have completed the agreement with the largest CPU IP company to integrate our security solution into the CPU architecture. This concludes my comments. Next, I will pass the time to Charles. Thank you.

Okay. So next, I would like to share with you about the Caliptra, which is Building a Silicon Root of Trust in Datacenters and Every Chip. As many devices are connected through Internet, there is a growing demand for emerging business models at the edge and higher levels of confidentiality between clouds and edge devices, particularly for the data center applications. Confidential computing for data center applications is raising the bar for security, requiring every individual chip at the SoC level to prove its trustworthiness. As a result, industry leaders have come together as part of the Open Compute Project, which is called OCP community to define and introduce Caliptra, which is a reusable silicon-level security IP block. We also call it the Hardware Root of Trust designed for integration into future chips used for the data centers, such as DPU, CPU, GPU and NIC and more, network IC. NIC stand for network IC. So Caliptra's development is spearheaded by NVIDIA, AMD, Google, Microsoft and other key players. The related Silicon Root of Trust IP will be adopted in the data centers, especially driven by the AI data centers. The milestones of the Caliptra are shown on this page. As you can see, Caliptra 1.0 has just been published in March of 2024. After knowing the background of Caliptra, let me share with you about eMemory's IPs can do for Caliptra. Caliptra Silicon RoT requires several key components, including Secure OTP, which is one-time programmable memory; and PUF, which is physically unclonable functions; and TRNG, which is true random number generator; and Crypto Engine. These elements establish a Hardware Root of Trust for the chip, ensuring the security of the operating systems, software and the personal privacy data. eMemory has been long -- has long been the major OTP IP provider. Based on our OTP technology, we also invented PUF, which is the most stable and reliable PUF in the industry. By integrating OTP, PUF and 4 environmental noise inputs, we have created the fastest true random number generator. To achieve Caliptra's high-level Root of Trust requirement, our Root of Trust plays a very important role. With the continued proliferation of the chips integrating Caliptra security (sic) [ Silicon ] Root of Trust, the demand for eMemory's IP will be increasing. And the next, I would like to further elaborate how eMemory's IP can achieve the 3 security functions required by Caliptra Root of Trust. The first important security function is unique chip identity, which is by chip fingerprint and also can be [indiscernible] PUF . This function is like a personal ID, with each chip having a unique identity number, eMemory's PUF and true random number generator can generate non-repeating random numbers stored directly into the anti-fuse OTP. And this unique chip identity serves as the foundation for the secure attestation process. After making sure the connected device unique ID, the next step is performing secure attestation, which should be done by the device certificate. So each chip must undergo the attestation, which is the process of verifying its integrity and the authenticity. This process involves generating a device certificate based on unique chip identifiers, granting the chip a genuine identity. With this certificate, the chip can be authorized by data centers and registered as a recognized device in the data center system to ensure secure connections. This process is similar to a company issuing a badge to a new employee, granting access to the company's facilities and resources. Following secure attestation, inter-chip communication via ciphertext is performed. True random number generator and the Crypto Engine will play important roles to ensure cybersecurity is maintained at a secure level. And the next after attestation is booting the system by Secure Boot. Secure Boot is a critical step in ensuring the integrity of the operating system during the boot process. If the tampered operating system manages to boot through a nonsecure boot process, subsequent applications may be vulnerable to malicious eavesdropping, which may lead to the leakage of private information. Secure Boot is essential to verify the authenticity of the operating system image and ensure that it has not been altered. During Secure Boot, the hardware used for performing security is initialized first. Then, the operating system image and code are authenticated through the hardware during the boot process. To ensure the integrity of operating system image, the source image must be protected and verified, which requires key generation by a true random number generator and encryption/decryption by a crypto engine. So eMemory has the full IP portfolio required for Caliptra Silicon Root of Trust. So with NVIDIA, AMD, Google and Microsoft implementing the Caliptra Silicon Root of Trust in data center chips, we believe the use of eMemory's IP in every chip for security will speed up. That concludes our sharings on Caliptra, which is building a silicon root of trust in data centers and every chip. Thank you very much for your time. Next, we will enter the Q&A section.

Thank you, Charles. This is our prepared statement. We will now begin the Q&A session.

[Operator Instructions] All of our questions will follow the format of answering the Chinese version first, followed by the English version. Okay. Li-Jeng?

[Foreign Language]

[Foreign Language]

The first question was during the last earnings call, you mentioned that there are 3 main areas in AI applications: computing, storage, and sensing. Which of these 3 areas will contribute the fastest to your royalty revenue? And which one will have the largest addressable market in the future. Michael?

Application systems, there are 3 main components: data input, data/model storage and computing accelerators. Currently, data input has go through various sensor applications, and eMemory has already entered the field and started receiving royalties. For data storage in NAND and DRAM, quite a few customers in NAND SSD controllers and CXL memory interface using our IPs, which also result in royalty contribution. In terms of computing, mainly in the advanced nodes, customers are using our Root of Trust IPs and SRAM repair IPs, and we believe it will significantly contribute to royalty in the future. Thank you.

[Foreign Language] Michael?

[Foreign Language]

The question was, do you have any solutions for chiplet-related? Michael?

eMemory's IPs have been adopted across various applications, which will be integrated into the packaged module as chiplets. One, in digital ICs for storaging key, ROM code and repairing high-density SRAM; two, in analog ICs for circuit repair and code storage; three, in DRAM ICs for DRAM repair functions; four, in NAND modules for storing keys for confidential computing. In the future development of chiplets, we anticipate that more chips in the chiplets will incorporate our IPs instead of just one chip. Thank you.

[Foreign Language]

[Foreign Language]

The question was TSMC's latest A16 process technology featuring Super Power Rail will relocate the power grid to the backside of the wafer. Will this have an impact on your technologies? Michael, can you answer the question?

Power primarily aims to achieve 2 objectives in process below the 2-nanometer: one is to improve power efficiency; and second is to reduce the number of back-end layers to lower manufacturing costs. This has no impact on the use of our IPs. Thank you.

[Foreign Language]

[Foreign Language]

The question was, you recently announced the new Board members this year, which include notable additions such as Dr. F.C. Tseng and Dr. Jack Sun, both well-known figures closely linked with TSMC. What is the reason behind selecting these 2 members? And how does it benefit the company? Michael?

Per FSC regulations, our independent directors have served 3 terms and, therefore, more than half of them need to be replaced. eMemory is a leading company in embedded nonvolatile memory within the IP industry. We will continue to collaborate with foundries in advanced process to develop cutting-edge nonvolatile memory and security technologies, while also expanding our business strategy and partnerships. The newly nominated directors will provide invaluable support to the company, bringing its expertise in technology, operating strategy and forging key partnerships. Thank you.

[Foreign Language]

[Foreign Language]

The question was, Synopsys recently acquired Intrinsic ID. Will this affect your PUF-based applications and business? Also, will this have an impact on similar technologies and IPs of your company? Charles?

After the launch of NeoPUF, our PUF technology, many customers have switched to use our NeoPUF and OTP instead of SRAM PUF from the -- SRAM PUF is from Intrinsic ID. The main reason is that our NeoPUF has better properties than SRAM PUF, including 5 different properties: first is the enhanced stability; second is increased reliability; and the third is eliminating the need for the error correction; and also eliminating the need for OTP for storing helper data; and we also demonstrate the radiation-hardened capabilities. So with these 5 extra properties, better than SRAM PUF, we are very confident that we will become a leading company in the field of PUF and OTP and TRNG and the Root of Trust IPs. And furthermore, Synopsys' acquisition of Intrinsic ID is a good sign that the industry recognize the significant potential and future demand for PUF in chip security and driving the provisioning of this IP solution through acquisition to better penetrate the market and capitalize on these opportunities. And eMemory recognized this trend in 2015 and developed the best PUF-based technology to address the problem encountered by SRAM PUF. Combined with our own IP, we can provide customers with a complete hardware security solution. We believe that we are at the forefront of this trend and will be the first to provide one-stop shop service to meet customers' demand.

[Foreign Language] Michael?

[Foreign Language]

The question was, TSMC is accelerating their investment in advanced 3D packaging technologies such as CoWoS, InFO and SoIC. Are there opportunities for your IPs? And can you tell us if you currently have any customers adopting these applications?

In 2.5D and 3D packaging, chips with different functionalities are packaged together. Therefore, if one chip fails, the entire package chip will fall. Our IP can help repair these failed chips. For example, memory components such as DRAM and SRAM and image sensors, CIS, are frequently combined with logic ICs. OTP plays an important role as a high-density memory repair and sensor repair in these packaged chips. We already have many customers in this area and continuing adoption from the new customers and applications. Thank you.

[Foreign Language]

[Foreign Language]

The question was, do you have any solutions for AI-related applications? Michael?

Three aspects to this question. One, AI applications need a hardware root of trust for protecting assets and ensuring operational security. We offer several security solutions tailored to address these specific security concerns related to the AI applications. Two, the computational demands of AI applications require substantial SRAM. Our comprehensive SRAM repair solutions are designed to improve the yield of AI chips and reduce the production cost. Three, AI applications rely heavily on the large scale of DRAM. Our complete DRAM repair solution can help meet the demands of AI chips in high-density memory applications. Thank you.

[Foreign Language] Michael?

[Foreign Language]

We noticed a significant increase in operating expenses in quarter 1 compared to last year. Was there a rise in recruitment during this period? And additionally, could you provide an estimate of the growth ratio of your operating expenses for the entire year? Michael?

Increase in operating expenses in the first quarter is mainly due to the increase in employee and director bonuses as a result of increased net profit before tax. We allocate bonuses expenses each quarter as a percentage of net profit before tax. That is 15% for employees and 1.5% for directors, which were included in that quarter's operating expenses. In the first quarter, there are foreign exchange gains in the nonoperating income, leading to an increase in the net profit before tax and nonrecurring increase in bonuses expenses.

[Foreign Language] Michael?