Marvell Technology, Inc. (MRVL) Earnings Call Transcript & Summary

Matt is going to kick things off with an overview of our data center opportunity. Loi is going to walk us through the architecture of AI data centers. Achyut will dive deep into our interconnect portfolio. Nick will discuss our cloud switching opportunity, and then Raghib is going to bring us home with custom compute. We will conclude the event with a Q&A session. I'd like to draw your attention to our forward-looking statements. As a reminder, this presentation contains projections and other forward-looking statements regarding future events and financial performance of the company. Such statements are predictions and subject to risks and uncertainties, which could cause actual results to differ materially. Please consider the risk factors in our SEC filings, which could potentially affect our business and financial performance. These filings are available on our website as well as at the SEC. During this presentation, we may make certain non-GAAP financial measures reconciliation to GAAP are available in the Investor Relations section of our website. With that, let's kick things off with a short video. [Presentation]

Please Welcome Chairman and Chief Executive Officer, Matt Murphy.

All right. Welcome, everybody. Good morning. It's great to be here, and welcome to Marvell's accelerated infrastructure for the AI era event. It's very exciting to be back in New York City with all of you in this very historic location. I want to start out by asking the group a question. Does anybody know what this number behind me represents? Is it the GDP of Italy? Is it NVIDIA's market cap? It's actually both. It's also the amount of data center CapEx that's going to be spent over the next 5 years to fuel the expansion of AI infrastructure in data centers. It's actually an astonishing number. So the $2 trillion question everybody is asking is, does this actually make sense? Does the expected economic return on AI justify this outside investment I think it's the question that we're all wondering about. We'll consider the current and future value of AI across numerous industries. It's not just about chatbots or better search experience. It's going to change the way we live and work. And it's not just simply about automating business processes. Companies are using AI to transform how they identify and manage risk, interact with their customers and accelerate their time to market with new products. Everyday companies, including Marvell, see new use cases emerge in engineering, manufacturing, financial services, healthcare and other industries. These are capabilities we never could have imagined. And I believe we're in the early innings of a generational inflection in technology. I was recently at a meeting where McKinsey shared their belief that these innovations will unlock something like $4.4 trillion annually in economic value. Additionally, insights have gathered from a number of industry conversations suggest projections that are even more ambitious. I recently had a discussion with the Chief Strategy Officer of one of the world's largest companies. He believes the figure is closer to $20 trillion of potential value capture over a longer period of time. So many of you here in the investment community have cited comparable or even larger numbers. So circling back to the original question, does this CapEx make sense? The answer is yes, absolutely makes sense, and it will be financed through massive gains in productivity and efficiency. So look, we can all debate about the size. $1 trillion, $10 trillion is it more -- what we do know is that there's a multitrillion dollar opportunity out there. So with that context, if you look at the technology investment cycle that's going to happen over the next 10 years, the CapEx being deployed makes a lot of sense. So we see this as a very, very real opportunity, and we're as well positioned as any company in technology to take advantage of this. We believe it's as consequential as the advent of PCs, the Internet or cloud computing. What you're going to hear today from me and my team is how the investment cycle in front of us in data center is going to flow massively in the semiconductor companies. We believe Marvell will be more levered to the spend on AI than any other company, except one. Every day, I open the Wall Street Journal, watch CNBC and what's everybody trying to figure out where is the next best place to invest for AI right now? And I'm here to tell you guys, it's Marvell, and you're going to hear all about it today. We've already started to see the benefit of this AI cycle translate directly into Marvell's revenue. Last year, we were over $550 million in AI-related revenue or about 10% of our company. That's almost triple from the prior year, where it was about 3% of revenue. And now the $550 million last year was almost all connectivity, including optics and some switching. So the business -- that business will nearly double this year. And then if you layer on custom silicon, which is in the blue, we see our AI revenue this year almost tripling again to be over $1.5 billion with about 2/3 being connectivity and 1/3 being custom compute. So we take that $1.5 billion and consensus estimates, AI will be close to 30% of Marvell's total revenue this year. And that's going to continue to grow. We see $2.5 billion as a solid base case for next year with upside if the market grows faster. And right now, it's a little early to call the exact split. I know everybody wants to get the exact split in the future. I'm not ready to call that yet, but we will be updating you along the way. Now a couple of things about these estimates I'm showing you. First, on the custom silicon side, the vast majority of our total custom revenue from Marvell is going to be an AI. Just to clarify that. The second is for our PAM4 DSP chipset and DCI revenue we only capture the AI-specific revenue in these numbers. So what you're looking up here today is AI revenue only. The remaining revenue shows up in cloud infrastructure, and you'll see those numbers flow through when I start talking about the bigger picture that is data center opportunity for Marvell. So as you already may know, Gen AI and the examples I mentioned are made possible by accelerated computing. Accelerated computing delivers the extraordinary computing power that's required, and these groundbreaking applications would not exist without it. What you might not realize is that accelerated computing would be impossible without the underlying accelerated infrastructure to support it. It's not just the power of the individual computers that makes this possible, but rather entire data centers full of computers connected through a massive data infrastructure. The reality is that there's a significant amount of connective tissue surrounding the compute, to move, store and process the data required to keep these systems running. And that's where we come in. At Marvell, we specialize in building the infrastructure for accelerated computing, which we refer to as accelerated infrastructure. All right. So how did we get here? On the left, this is Marvell's mission statement that we created in January 2017. It's very simple. Our goal is to be the world's pure-play chip company to move, store, process and secure the world's data. And our thesis at that time when we came up with this mission statement was that the biggest TAM growth in front of us in the semiconductor industry was going to be in data infrastructure. And that was going to be driven by the growth in all the data platform companies who are emerging. And that strategy has proven to be remarkably sound. Our mission statement has not changed in 7 years. In fact, it's only become even more relevant now for the era of accelerated infrastructure. And if you look at the foundational pillars you need for data infrastructure, it's compute, it's connectivity and storage. Now both our security and storage businesses will get a tailwind from AI. These are standard products across the data center market, but we're going to set them aside today for the purposes of the discussion. In the past several years, we've built leading franchises in each of these product categories. And today, we're positioned to be the semiconductor industry's accelerated infrastructure leader because accelerated infrastructure is data infrastructure in its most powerful and technologically advanced form. AI is the most data-hungry application the world has ever seen. So our journey has led us here. We built this company to address this extraordinary opportunity. Today, we're going to focus on the opportunity in the data center where AI has reached a critical inflection point. AI infrastructure can be broadly categorized into these 3 areas: compute, connectivity and storage. As I mentioned, storage is going to be common across all -- across AI and all other types of cloud. So we're not going to really do a deep dive on that today. But it is a core business at Marvell where we do have a leadership position. The next is interconnect where we provide the world's leading platform of physical layer connectivity solutions, independent of the networking layer or the compute layer. At the switching layer, Marvell provides one of the world's leading Ethernet switching platforms. And you'll hear today that there are actually multiple different networks inside these AI data centers. And Ethernet is the preferred choice in many of these networks it stands out as the world's most widely embraced interoperable network layer. Now for compute, XPU refers to GPUs, CPUs and DPUs. It's all the computing that's needed for these intensive data processing tasks. Here, Marvell is focused on building custom solutions. The architectures of these large cloud companies are completely different. I mean they actually design and build their own individual data centers with domain-specific infrastructure optimized for their own applications. So every hyperscale data center today is building or planning to build their own compute silicon for a portion of their workloads and Marvell is an ideal partner for these customers. So let's walk through this one by one, starting with interconnect. These AI data centers are complex. There's -- right now, there's no unified architecture and even within a particular data center, there are a multitude of different clusters connected together. Now you're going to hear more about this architecture from Loi, but for now, just take note of how many links there are. So everywhere you see a link, you should think Marvell. And each of these links has a certain bandwidth, distance and power requirement. As you can see, an optical module is located at each end of these individual links, and you'll hear from Achyut about how Marvell is innovating and optimizing solutions for every type of link imaginable. But you might be wondering, well, why so many links, why it's so much variety in terms of speed and distance and power. And the reason lies in the fundamental difference between accelerated and general purpose infrastructure. In general purpose computing, a single workload is processed on a single processor or a fraction of a processor by using virtualization. That's not feasible with these large and demanding AI workloads. They cannot be easily decomposed to fit on a single processor. So they require a huge number of interconnected processors working together to manage a single workload. This could be anywhere from dozens to tens or hundreds of thousands or more. And in this context, the connectivity between the processors effectively becomes part of the compute itself. It directly impacts the time it takes to complete a calculation. So with accelerated infrastructure, the compute and connectivity are fundamentally blanked and innovation and connectivity is needed at the same rate as the innovation in compute. Now to understand the opportunity for connectivity within accelerated infrastructure, we just need to do some simple math, okay. More accelerators drives more ports to be connected. There are typically multiple ports per accelerator. So the number of accelerators grow, so do the number of ports. At the same time, accelerators keep getting more powerful, require more bandwidth to keep them processing data. So faster accelerators require higher-speed ports, and this drives the associated content growth to deliver the bandwidth. Put it all together, and this yields exponential growth in the connectivity framework of these hyperscale data centers. This is a large and massive rapidly growing market and a massive opportunity for Marvell. Achyut will talk more about this in his presentation this morning. Now moving on to the switching layer. Ethernet switching is an essential part of our accelerated infrastructure offering. Marvell has one of the largest Ethernet switching businesses in the industry today. Our cloud switching portfolio was called Teralynx, and that came with the acquisition of Innovium that we did. Now we've combined Marvell switching team with Innovium, significantly increased our resources on Teralynx, and accelerated our road map to position ourselves for the AI opportunity in front of us. We're in high-volume production today on our 12.8T generation, and our new 51.2T product is ramping into production soon. The whole combined team worked on this together. And just to give you a sense, this is a reticle size chip with over 60 billion transistors. And we went from 16-nanometer technology at 12.8T, directly to 5-nanometer technology at 51.2T. We moved from third-party SerDes to Marvell best-in-class SerDes. We doubled the IO bandwidth and quadrupled the transistor count. This product has received extremely well. And Nick will talk about how we're scaling up this business to win in data center switching. Okay. Now let me take you back in time a little bit. I see a lot of familiar faces. So some of you were there. all the way back at Marvell's 2018 Investor Day, where we shared our vision of what we believe to be the future of computing in the data center. Now we had just closed the Cavium acquisition. And as you can see back then, 6 years ago, we were focused on DPUs, security and network offload, ARM-based CPUs and AI. So again, this was 6 years ago was our point of view, okay? Now let me tell you what's transpired since that. 2019, we went to market with these products, and we got very clear feedback. The strategy was right. Customers like the technology, but uniformly what we heard is that every one of these companies was going to make custom silicon a priority over the long term. So we acquired Avera, and we made a number of other organic investments. And then we outlined all of it for you guys at our 2021 Investor Day with our cloud optimized silicon strategy and platform. We also outlined a set of design wins back then that we said in the FY '25 to '26 time frame, which is where we are now, that these would grow to be projected around $800 million of annual revenue at full ramp. So we're going to be at that run rate now by the end of this year, and we're going to blow past it next year. To be clear, there is a broad opportunity for customization. Today, accelerated compute for AI is hot and it's driving most of the volume and revenue. However, there are other important custom computing applications. Every one of the large hyperscale companies is working on some or all of these applications in some way and we're strategically engaged with every customer. So the result of all this is that there's a tremendous amount of design activity right now across all these customers. And let me just give you some simple math on why that is. First, you do have multiple customers in this market. You have all the applications that I showed you on the previous slide. Some of these have multiple SKUs per application for different performance reasons. And this type of business is also multigenerational in nature. So when you're working on the current version, you're also working on the next version, typically. So when you put it all together, there's a lot of projects and opportunity in flight at any given time. So it's not just one AI chip for one customer, every 4 years, and that's the cadence. It's an amazing opportunity right now. And as I said, the biggest opportunity in custom silicon today is within the AI compute silicon itself. Now we've shared previously that we had won two sockets for two different customers. And I'd like to expand on that today. The first socket is an AI training accelerator for a U.S.-based hyperscaler. Its customers using the chip and their AI clusters and systems, and it's ramping incredibly fast. The partnership, teamwork, design, qualification on this product has been a huge success, and I'm very proud of the accomplishments of the combined team on this effort. In addition, as part of the same development process, we're planning to ramp the AI inferencing accelerator next year. So given all this, we now have multiple years of visibility on this particular program. and we expect revenue to continue in the next generation as well. The second customer design is an arm CPU for a second U.S. hyperscaler. This will be deployed in their general cloud computing platform as well as in their internal AI infrastructure. Both of these sockets, the AI training accelerator and the ARM CPU are in production now and ramping for revenue this year. All right. So today, I'm excited to share with you some new news. And it wouldn't be a Marvell Investor Day if we didn't give you guys a little bit of new news, right? So the new news, and it's great news for us is that we've won a third U.S.-based hyperscale customer for AI. It's for an AI accelerator. It's in design now and the customer wants to take it to production in 2026. It's clear that our engagement model with these customers is evolving, and these initial wins have now turned into engagements that span multiple products and multiple generations. So if we take a step back, Marvell now has design wins that are either going into production now or in design with 3 of the 4 U.S. hyperscalers. And our design win funnel is up by a factor of 8x where it was when we started this custom business just 5 years ago. So let me talk to you a little bit about how we support this massive set of designs that we've got. And let me just give you a sense of this R&D scale of Marvell today supporting the whole portfolio. First of all, we're a pure-play data infrastructure company. Our R&D spend is approximately $1.5 billion a year. Now that R&D is actually bigger than that because we receive NRE funding from our customers for these custom projects we just talked about. So we capture that at Marvell as an offset to R&D, we don't capture it as revenue in the top line. So all this R&D is only going into data infrastructure applications. So if you look at our largest peers, we're very competitive with them in terms of our R&D profile for this opportunity we're talking about today. It's right in the same ballpark. And compared to the rest of our smaller, less scaled up peers, is not even close. And the reason why this is important to our customers is that they want to know that their key partners have sufficient R&D scale and commitment to this market long term. And we're a scaled up as any major semiconductor company in this area. So the benefit of this partnership is multifaceted. As an extended part of their R&D team, we're working hand-in-hand with our customers to co-architect their next-generation data centers. And by having the strategic position on the custom compute side, we gained unique insight into the next-generation architecture requirements not just for the custom compute but for all the connectivity, the higher layer switching and our customers' overall plans for their next generation AI architectures. So this gives Marvell a significant advantage over our competition, having this deep kind of partnership and insight, unique insight. So let me tell you now how we invest to win in this market. First, you need to have an immense amount of IP and technical capability. And our team has been very thoughtful, very deliberate in recent years about building our technology platform. We've assembled a powerhouse of infrastructure technology second to none in the industry. Marvell is building some of the most complex digital products in the world. This includes chips that are among the biggest in the industry. To thrive in this business, we need to operate also with the leading-edge process node. So building on the success of our 5-nanometer and 3-nanometer portfolio, we're now aggressively investing at 2-nanometer. Our SerDes technology is world-class. And that's why every single hyperscale data center operator today relies on it. And it goes beyond IP. We have best-in-class packaging technology, electrooptics technology, analog capabilities. We focus on meeting customer needs for low-power design, seamless interoperability and more. And there are precious few companies that can match Marvell's technology assets and capability. Now we're making this investment, this huge investment because we believe this is the biggest opportunity in the semiconductor industry in decades. And let me talk to you about how big that opportunity can be. Okay. So let's take a step back and look at the big picture. So last year, total data center CapEx was about $260 billion. And of course, some of that is in buildings and infrastructure. So if you take that out, gets you to about $197 billion. And that's the infrastructure equipment TAM. So then if you break out semiconductors, it gets you to $120 billion. Now we don't play in the analog and the memory side. So if you break the $120 billion down further into the core semiconductor TAM, excluding analog and memory, it's an $82 billion opportunity last year and growing very fast. Now let's break that $82 billion down further into the categories that we've been talking about that Marvell addresses. So compute is the largest portion at $68 billion. And I'm going to drill down on that a little bit more in just a moment. Interconnect was $4 billion last year, switching was $6 billion and storage was about $4 billion. So let's talk about that $68 billion market now. First of all, it's growing very fast, and it's expected to become a $200 billion opportunity by 2028 with a 24% compounded annual growth rate. Now some people believe that this number is even larger than the $200 billion. And for us, that would be even more exciting. That was the case. But right now, we're using analyst estimates, we're using our own view, and we're setting this as our base case scenario. So when you break down the $68 billion, $26 billion is in general purpose computing, $42 billion is accelerated. In general purpose compute, if you look over the long term, is expected to remain relatively flat while accelerated compute is essentially driving all the growth with a 32% CAGR. Now let's talk about what portion Marvell can address. And remember, our focus is on the custom portion of accelerated compute. So if you look at this past year, about 16% of the TAM was already in custom. It was about $6.6 billion. And if you go out to 2028 and you assume custom maintains the same share that becomes a $27 billion opportunity. Now we believe custom is probably going to gain share over the next few years because ultimately, most of these hyperscalers are just getting started. So right now, we're estimating that about 25% of that will be custom and that gets you closer to a $43 billion market opportunity. So in the end, depending on your assumption, the market for custom is going to grow anywhere between 30% to 45% a year compounded annual growth. And if you take a step back and just think about this for a minute, in either of these two scenarios -- you actually get a custom compute market that's as big or bigger than the general purpose compute market by 2028. So with that in mind, let's now look at Marvell's total opportunity in data center. So starting with storage, it's going to be a $6 billion market last year. It's growing about 7% CAGR, and historically, that's a relatively typical growth rate for storage in data centers. Interconnect is a very fast growing at 27% CAGR, and Achyut and Lloyd will talk to you today about the key drivers, but basically you have a $4 billion market, growing to $14 billion by 2028. Switching is a $6 billion market growing to $12 billion, so that's 15% per year. And with that foundation, now let's add the $43 billion I talked about and I showed you earlier, and we get a $75 billion total available market for Marvell in the data center in 2028. With a CAGR that's growing at almost 30%. So this is a massive opportunity, a massive opportunity. And let me show you what that means for Marvell. Okay. Now start off, let me put this in context for everybody. So last year, the TAM that we're talking about was $21 billion, and Marvell did approximately $2.2 billion in revenue. It's about 10% share. And going forward, we have very aggressive plans to grow the business across each of these categories. And you're going to hear from my team about our plans to address each of these markets. In accelerated compute, we have line of sight to gain share significantly based on those design wins that I talked about earlier. In switching, we also expect to gain share. Now we're a relatively small part of that market today. But we're making a big investment, and we're getting a lot of traction. We already have a leadership position today in Interconnect. So for now, we're just assuming in our base case scenario that we'll maintain the leadership share that we have. And in storage, we're also planning to maintain our share position. So what does that mean? Well, when you add it all up, our goal at Marvell is to double our share over time from 10% to 20% over the long term. That's what I'm driving the team towards. That's what we're all committed to here, you're going to hear from the team, and there's almost no other company out there that I can find that has the opportunity to grow their market by 3 to 4x over the next 5 years and double their market share at the same time in an enormously large market. And that's Marvell's opportunity. That's the opportunity in front of us right now. So I want to take a moment to thank you all for being here. It's an incredible time to be in the semiconductor industry, and it's an incredible opportunity for Marvell. Our company was purpose-built for this moment. And I hope that you enjoy the rest of the day and that by the end of today's session, you'll be as excited about the future of Marvell as I am. Thank you all very much.

Please welcome Executive Vice President and General Manager, Cloud Optics, Loi Nguyen.

Good morning, everybody. I see many familiar faces. But for those of you who don't know me, I was Co-founder of Inphi. So I joined Marvell as part of the Inphi acquisition about 3 years ago. Really happy to be with Marvell and look at the opportunity that Matt just showed. It's just amazing. So I've been in this industry for 25 years, all my professional life working on I speak interconnects. So really excited to be here to talk about interconnects and how it's enabling AI. So let's get started. I love this image. I don't know anyone recognize it. It's the Turing machine that was built during World War 2. Mr. Turing did not have an AI accelerator as we have today. But he was able to build a very fast computer that brought the Nazi's code by using massive parallel system and lots and lots of interconnects. Today, 80 years later, we are doing the same thing, but the interconnect today for AI are high-speed optical. Marvell is a leader in high-speed optical. So let me show you what is driving the speed of innovation of high-speed optical? Let's take a look. I love this music. 2023 was truly ground 0 for AI before AI speed of interconnect were driven by cloud data center server upgrade, and that happened once every 4 years. So every time it happens, the speed doubled. Today, the speed is driven by AI, much faster. We see the speed is now doubling every 2 years. And customers actually say, "I want them sooner, can you do it? Well, let me talk about why optical, right? There are coppers and other things and coppers [indiscernible] long time and there's low cost and cheap. But optical is the only technology that can give you the bandwidth and the reach needed to connect hundreds of thousands and tens of thousands servers across the whole data center. No other technology can do the job, except optical. Last year, GPT 3 were trained on a 1,000 cluster using about 2,000 optical interconnects. Today, I will speak GPT 4 being trained on the 25k cluster, 25x larger and that requires about 75,000 optical interconnects. The model will keep larger and larger. We see 100k cluster is going to be available soon and that may require 5-layer switching. So maybe 500,000 optical interconnect. And people are talking about 1 million clusters. I cannot imagine 1 million cluster, but that's the kind of numbers that people are talking about today. And that may be [indiscernible] million of optical interconnect in a single AI cluster. So I know there's a lot of questions I get asked all the time how many optical interconnect accelerator. That question being asked on the time. So this number should only be used as a [indiscernible], small cluster like 128 you can connect the one way of switching, so that's one-to-one based on today's architecture. A medium-size cluster, 1k will require 2 layers of switching, so that 2:1 -- and the remarks cluster that we know how to build a 25k will require 3 layer fitting and so on. So that's 3:1. So the ratio went from 1:1 to 2:1 to 3:1 in the future, 5:1 and could be even 10:1. So no matter, how do you look at it, the optical interconnect will grow faster than accelerator growth in an AI cluster okay? Second question that I often get asked what about training versus inference, what are the different which more optical interconnects. Well the answer actually very simple. Training for loss model, you want the largest cluster that you can lay your hands on that you can afford actually and have availability. So 25k, 50k, 100k, 1 million, whatever, right? But are few of them around the world. For inference, the size of the inference machine vary depend what you're trying to do with it and different verticals. They size vary, but you need a lot of them deployed globally to actually monetize AI. So net-net of it is kind of kind of the same, training, large, cluster, a few of them, inference small cluster but , lots of them. So the net-net both will drive a massive amount of optical interconnects. Next, I want to talk about the need for new infrastructure for AI. Matt talked about the $2 trillion to be spent over the next few years. This is a world map of the 1 data center today. There's about 6,000 data centers, some like some more small, whatever they distribute. And you see the distributes are around #1 wealthy countries, highly populated countries. The things will change as we move forward, that $2 trillion spend is going to be spread more globally. The reason for it is, #1, power. AI servers consume more 10x power than a gen-purpose server. So you need to deliver a lot of power to it. And with typical data center today, the power is 32-megawatt. People are building 1 gigawatt data center today every speed. And in location, you never heard of, right? But power design privacy laws, national security, solvency require AI cluster to stay within borders. So you will see a lot more data center that are going to be built in existing locations as well in new locations that don't have data center today. Timing-wise, 2 days ago, my wife sent me a note say, look at this, Loi, Microsoft just announced that they are investing $2.9 billion to build the larger AI data center in Japan. When you look at the map, there's a lot of dots in Japan already. Why do you need new data center? Because for the simple reason that I cited, the current existing data centers are not suitable enough, have capability and so on for AI. And the $2.9 billion Microsoft now is going to be spent over the next 2 years, and it will be the largest investment Microsoft ever been made in Japan. So this is just one proof point, but you will hear more and more about it, okay? So the upside of this $2 trillion spend, you're going to have more data centers, more locations, and all of those drive a lot of interconnect, both inside the data center and between the data centers. The market that Marvell is serving today. All right. So that's the setup. Now what I want to spend the next few minutes here to talk about the accelerated infrastructure that Matt talked about. There's a lot of confusion about all the network that I needed. The back-end network, the front-end network, the compute fabric, the DCI, what are on these things do. So I hope that in the next few minutes, after my session, we will have the same common language, what are these networks do and where they're over optical or they are over copper, all right? So bear with me. So here is the AI server. You have inside a couple of accelerators are connected together with very high bandwidth fabric. This is often referred to as a compute fabric. They are very high-speed fabric but over very short distances, coppers, on traces on the board. And the protocol are envying and Infiniti and PCIe. So whatever you see unveiling -- you know that there are short distance links over copper. Now recently, this has been extended to within the rack, but it's still in 1 media range. So let's just be clear, today, Marvell doesn't play in this compute fabric. It's on copper, passive, right? How do you connect the AI server that I talked about, 1,000 server in the data center network what we call the back-end network. So how do you get data in the back-end network? Well, every accelerator has its own network interface cap or Every is connected to a module, and that's how the module be connected to other modules within the switches and within other AI servers. So remember that. The back-end network is where you connect AI server to other AI servers and the protocol are InfiniBand or Ethernet over optical. So whenever you see InfiniBand or Internet, NII cluster, you should think about probably a back-end network and over optical. This is where Marvell placed. We are the leader in that space. Now next is how do you get data in and our an AI server, not to the back-end network. To get data in and other AI server, you go through the front-end network. So this is where you see CPU inside an AI server. Typically, there could be 1 CP, it could be 2, whatever the number of CPU, each CPU has its own nice card and every NIC has its own connected to their own optical module. And that is how AI server connect to the rest of the data center, storage and other switches and so on. So those are the 3 times that connection go into an AI server. And this and the front-end network is always Internet over optical. So let's see how all of these AI clusters are sitting -- are connected together the background. This illustration showed thousand of AI server connected together. We have 2 layers switching via the back-end network. All the blue links here are optical. Data center may have more than one AI cluster. So let's see example here 3 AI clusters. How are they connected? They are connected together to the rest of the data center to the front-end network show the front-end network, a bunch of general-purpose CPU on your right. And this is how all everything connected there. The front-end network because there's so many elements within the front -- within the data center. So there may be 4 or 5 tier layer switching. So there's a lot of optical interconnect, Internet actually still sitting in the front-end network. But you can see here why AI driving so much optical interconnect -- on the left -- you have the back-end network associated with each cluster. On the right, you have the general-purpose only connected to the front end. So this whole thing about back end is on driven by AI. That's why AI driving so much -- so many more optical interconnects. All right. So how do data get in and our data center? You need another network and the data center interconnect, the yellow on top. And that is 100-kilometer links to connect data center to data center in the region. So now a recap, there are 4 networks total. Compute fabric over copper traces inside a server within [indiscernible]. Back-end network, InfiniBand or Ethernet overall optical is on Marvell, mostly. And the front-end network, again, optical Ethernet, where Marvell play a very large room. And DCI network is also on Marvell is a leadership. We play a very large room. So I hope you get it. There will be a lease at the end of the session for these 4 networks. All right? All right. Now let me talk about Marvell silicon TAM. Matt talked to you about every time you see a link to think Marvell. So every link here, there's an optical module at each end. And inside the optical module, you have the DSPs, the TIAs, the driver, and today, we're going to add another chip silicon photonic to the toolkit. So you will hear more about it from me in the later section. But I want to spend a few minutes. I'll talk about the DSP in particular. So a year ago, there was a lot of noise about -- some people say, you don't need a DSP, you remove the DSP, delete the DSP, to say the power blah, blah, blah, right? Many of you who attended OFC this year, you heard the customer has spoken, the largest hyperscale provider in U.S. has spoken that they need the DSP. You saw what I show on the network. There are hundreds of 100 of 1000 of the optical interconnect within a single cluster. Who's going to go and for every channel to get the optimum solution. Now time is the most process commodity for this cluster to deploy. In fact, one hyperscale provider set the on linear LPO sets the industry back to the stone age because there are no telemetry, no diagnostic, no interim and so on and so forth. So you'll hear more from my colleague, Achyut about Marvell Interconnect. And then switching. So you heard about the Marvell acquired company in that bring to us a tailing live switches, switching, and we are gaining share in the market. And you hear from my colleague, Nick. Really exciting area. Last but not least is in AI server itself. Today, the majority of AI accelerator being shipped today are using merchant silicon. Marvell doesn't do merchant silicon like Matt just talked to you about. But Marvell does is custom compute. When you have custom compute on the block within the server on our Marvell TAM, and you will hear from Raghib. And in fact, on custom compute, as Matt showed you, is the largest TAM within Marvell that we can address over the next few years. When you look at all these things, these are on the socket that Marvell is addressing today, and that's growing to a gigantic $75 billion TAM in the next few years. And that's it from my setup today. I hope you enjoyed the talk. And I hope that from now on, you will hear and know everything there is to be about the foreign network within accelerated infrastructure. And with that, I'd like to hand it over to my colleague, Achyut to talk to you about Interconnect.

Please welcome Senior Vice President and General Manager, Connectivity, Achyut Shah.

Good morning, everyone. I'm Achyut Shah, the Senior Vice President and General Manager for Marvell's connectivity business. Did you know that every single large language model today runs on compute clusters that are enabled by Marvell's connectivity silicon. And I'm going to talk to you today about the fantastic opportunity that lies ahead of us. A quick introduction of myself. I started my career over 25 years ago, getting a degree in electrical engineering at Maxim Integrated. And at that time, I joined their optical business unit and the products we were working on at the time were 100 megabits. The dream, the vision at the time was, can we get 1 gigabit over optical. Fast forward to today, we have links of more than 1 terabit toward optical, 10,000 times that 100 megabits still not enough for our customers. I spent 20-plus years at Maxim, for my last role was General Manager of the Cloud and Data Center business unit, which created optimized silicon for both the power and the optical products within the data center. In 2020, I joined Marvell to lead the physical interconnect business unit. And shortly after the acquisition of Inphi, I was tasked with integrating the Inphi optical DSP team with the Marvell business unit to form what we now call the Connectivity business at Marvell. I'm very thankful for Ford and for Matt for trusting me with this opportunity giving me this responsibility. And I'm very proud of the team that we formed. A cohesive collaborative team of industry leaders in the interconnect technology with expertise over a wide variety of analog, digital, mixed signal DSP algorithms, firmware and software. And this team has come together to provide the best-in-class solutions for our customer or multiple generations, making Marvell the industry leader in this interconnect space. There's a lot of bandwidth needs our customers have. It's insatiable. And I'll walk you through today of what our customers are asking for. What are the underlying market trends driving these needs and how Marvell is very well positioned to capitalize on this opportunity. Let's first take a look at where these networks are deployed and what actually goes into creating an interconnect. Loi walked you through the back end and the front end and the DCI networks, the logical flow of the network's hierarchy. But if you look at it from a physical perspective, you can think of this as interconnects within the building, within the data center and interconnects leaving the data center. Within the data center, you have the front end and the back-end network, these are typically less than 2 kilometers of distance and they use a signaling scheme called PAM modulation. For the interconnects leaving the building, now these are much, much longer distances, hundreds of kilometers, thousands of kilometers. And this uses a much more complex signaling scheme called coherent. But regardless of the distance, the optical interconnect comes down to optical modules connected by a length of fiber. And these optical modules have multiple components in them. You have the TSP, you have the Transimpedance amplifier or TIA and you have the laser driver. Now what do these products do? The initial use case for the DSP is very simple. Everybody understands it. You have the SerDes technology, you have some complex signal processing to make sure that the signal gets from one end to another with no But there are 2 other use cases of these DSPs that are less clearly understood are less visible, but that are equally important for our customers, scale and reliability. When our customers deploy these networks, they don't start deploying hundreds of thousands of units at a time. They have these massive data center clusters, tens of thousands, hundreds of thousands, millions of units that all need to work and come up at the exact same time. These are across multiple locations in multiple data centers, connecting multiple endpoints using multiple kind of optics, tons of manufacturing variability between them. And the DSP helps to make sure that at this vast scale -- you don't have to fine tune every link by hand. It all comes up plug-and-play and works when you need it to. The second function that this DSP does and provides is reliability. When a customer is running these very large language models on these massive clusters. And these data sets takes weeks, sometimes even months to run. In that time, if even one link goes down for an instance, the entire job collapses. You lose all that weeks of work, months of work, turns of loss of revenue in terms of loss of profit. So these DSPs have intelligence in them, diagnostics, telemetry, system-level intelligence that protects the quality of the link and adds the margin where needed to make sure that the links stay up. It also detects and can tell the network if a link is going to have a catastrophic failure so that customers can cut over to a redundant link to make sure that the job doesn't go down. So this is the incredibly important part, part of the network, the DSP. You also have the laser driver, which takes the output of the DSP, amplifies it for very different kind of lasers and transmits it on the other end of the link. And then the Transimpedance amplifier takes the received signal amplifies it cleanly and passes it on for the DSP for post-processing. And to form all of these solutions, the DSP, the TI, the driver, there is a very complex set of underlying technology behind it. You have leading-edge digital products. You have coherent IP, PAM IP, signal processing IP at our correction that currently, we are shipping in 7 nanometers, 5 nanometers goes to production this year. We're actively developing these DSPs in 3 nanometers and already investing in 2 nanometers going down into the future. On the other hand, you have very complex high-frequency analog, black magic of the semiconductor world. You have high-frequency silicon germanium BiCMOS processes to create TIA and drivers. And in future generations, you have to take these high-frequency elements and actually put them back into cutting-edge digital. And all of this takes a wide variety of expertise of engineering leadership and expertise to develop this full platform of solutions. Only on top of these complex technologies, the system-level IPs that you need, diagnostics, telemetry, firmware and software that provides a significant amount of flexibility programmably to our customers to optimize their networks because we don't develop all of these together in a vacuum. We work with our customers, multiple years, multiple generations ahead of deployment to understand what their network architecture is, what their deployment models are and how they need to optimize each of these links to get them to scale and the TCO that they need. So you -- on all of these customers don't have a one-size-fits-all data center. So there is a tremendous amount of flexibility and programmability in all of these blocks so they can optimize these products for their specific implementations within the data center. And now we'll take this entire set of IP with the programmability, the analog and the digital and with the accelerated pace of AI, every single block here now has to be upgraded and redesigned on a 2-year cadence. This takes a lot of expertise. It takes a lot of experience, and you need the scale to be able to do this successfully generation after generation. And that's what Marvell has been able to do. Now let's take a look at this great opportunity in front of us, starting first from inside the data center networks. Optical links that Loi talked about. Marvell has had a multi-generation leadership in this PAM inside the data center platform. We provide the DSPs, the TIAs and the drivers. A decade ago, Inphi created the world's first PAM DSP. This was a 200 gigabit product that at 4 lanes of 50 gig. Marvell was also the first one to create a 100-gig per lane product that created a 400 gig optical module. And then we scale that technology to 800 gig and that's what's driven the AI revolution in the last year. Now we worked with our customers for multiple years before this 800 gig product was developed. And at that time, we knew exactly what optimizations they wanted. We knew exactly when they wanted the product. What we did not know is how much of it they would want in the last year. And really very thankful for having that growth and that revenue, driving Marvell's growth over the last year, 1.5 years. And looking forward, we announced our 1.6 terabit per product, which was the first in the world to develop a 200 gig per lane solution last year at OFC. And just a few weeks ago, you saw the world leader in AI infrastructure announced that their next-generation solutions need 1.6 terabit interconnects. That's what Marvell has developed. Today, we are in qualification with 1.6 terabit solutions at multiple customers and we expect to go to production at multiple customers by the end of this year. Our customers still ask us not enough. What have you got for us next? And as AI becomes a much larger part of the data center, we have seen that it accelerates the need to move to the higher speed. Back in the traditional data center networks, you started with 100 gig NRZ, moved to 200 and 400-gig PAM. And these cycles happened every 4 years. But you've seen a significant acceleration of that at the 800 gig and the 1.6 terabit generations happening right now as these cycles have changed and shrunk from 4 years to 2 years. We see that trend continuing. We are already working closely with customers to enable 3.2 terabit PAM generation in the next couple of years and already doing advanced R&D, again, closely with our customers to develop even future technologies going to 6.4 terabits. And what this does for us is provide significant growth in the market because not only are these cluster sizes growing like Loi showed you, from thousands to tens of thousands to hundreds of thousands of GPUs and XPUs. But every time they got to be connected by faster speeds, Marvell gets higher silicon content. So you now have this rapidly accelerating market growth driven not only by units, but also by higher speeds and higher content providing a tailwind to the TAM. But why is this time to market so important? When we ask our customers, they tell us the most precious commodity for them is time. And the reason for that is when you have these very large language models with billions of parameters growing so quickly. If they stick to the previous generation network, the previous generation infrastructure, the amount of time it would take them to run these new models would not make it economically viable. It would be months, even more. So they have to keep up with the scale of the language models growing. And for that, we have to increase their infrastructure, the compute and the connectivity every couple of years. So their focus is always to move to the fastest and the best product quickly that enables that TCO. Now you have people come out with solutions that provide some marginal benefits backward looking. They simply don't have the time to qualify that because the small fraction of TCO saving it saves them in the next 6 months will be wiped out if they don't move to the next generation and over the next year or 2 years, very quickly. And when our customers deploy these products, it's not that simple. You take the cutting-edge technology for interconnect. You have to marry to the latest generations of compute elements, CPUs, GPUs, the switches, the NIC cards, put all this interconnect together and create an entire system that takes months to qualify. So now if you have a 2-year cadence, and you're already taking 4 or 5 months to qualify one generation, you don't have time to come back for a second gen and take another 6 months or a year to qualify something new. You're already moving to something faster. And that's what makes these solutions very sticky. This is what provides significant growth for Marvell going forward as these cluster sizes and speeds continue to ramp. And as great as this optical opportunity is in front of us for the next multiple years and multiple generations, we can also take this PAM IP that we have developed and our leaders into that and actually use it for open a completely new market, an opportunity for Marvell. This is where we can talk about DSPs for the active electrical cables. Now we've talked a lot about optics everywhere, but still within the very short reach within -- in the data center, think of it as a couple of meters, few meters in the rack, you're still using copper. A couple of examples in a traditional network, you have your NIC to top of rack, the tour, interconnect, which is 3 to 4 meters, that is copper today, passive copper. And even in the AI server, there are interconnects that are either today on the board or even have cables connecting them. And as the speeds go up, as reach decreases, you're going to have more and more of these cables. But today, a lot of this stuff is passive copper, right? No content for semiconductors in it. So why do we need to go active here? Take an example, you have a 50 gigabit link connecting the server to a NIC, some interconnect, 3 or 4 meters in the rack. At 50 gig, the signal gets from one end to another with no errors, no problems. But now you're doubling the speed to 100 gigabits per lane. And as the speed goes up, law of physics, loss has increased. You also have another vector happening here. As the density of these data centers grow, our customers want to fit more and more interconnects in the rack, significantly increasing the faceplate density in these racks. So now we need to use thinner cables. And to thinner the cable, the more the loss. So you now have the speed doubling, increasing the loss. The cable is getting thinner, increasing the loss. So now when you go from 50 gig to 100 gig, the link -- the distance cannot close at that speed with a passive cable. You now need to add electronics to it. You need to make it an active cable because the size of your rack doesn't change. The distance is fixed. So to bridge that distance, you now need active electrical cables, which are essentially these copper interconnects with DSPs in them, opening up a whole new market for Marvell using the same PAM IP we have on the optical side. Now AECs have been around for a few years but they've always been used in niche applications. At 25-gig NRZ, when customers had specific links that did not work or had a problem, they used AECs. But as you get to 50 gigabits per lane and 100 gigabits per lane, the used cases are going to balloon. And as a result, the customer need scale. They need an ecosystem that enables them the flexibility and the capacity to be able to take all of these copper interconnects and move them from passive to active over a number of generations. So what Marvell is doing is not only creating these DSPs but also creating an entire ecosystem similar to what we enable on the optical side to allow multimillion unit links within the data center with AECs. Today, in the optical space, we have multiple module partners that work with our end customers, and we are doing exactly the same thing on the AEC side. What you see here are -- most of them are probably all the leaders in copper cable connectivity today and we are working with every single of these partners. We're using Marvell DSP technology, creating AECs and currently getting them qualified and in production at multiple end customers. And so we expect these PAM DSP-based AECs to enable another $1 billion TAM for Marvell, something that we are already shipping to multiple customers to today. Significant growth opportunities inside the data center on the optical side and the new emerging opportunity on the copper side, but it's also exciting growth in the longer distance links between the data centers. This is a place that Marvell has also had multiple generations of leadership in the DCI platform. Now our go-to-market in this space is a little bit different. Inside the data center, you have millions of units, millions of links, and we sell the silicon, the TIA, the drivers, the DSPs. But here, it's a smaller market in terms of units, but it's incredibly more complex technology. So this is where Marvell has all these pieces of silicon, the TIA, the drivers, the DSPs, and we also do our own silicon photonics that Loi will talk about. But it's incredibly complex to put all these together into a module that gives you the reach but within the space and power envelope of a small optical module. And so this is something where market -- where Marvell makes the entire optical module. Inphi was the first one to enable a coherent DCI link within a pluggable optical module. Before that, it was all these large transport boxes. We first created this market at 100 gig, and we've scaled it to a 400 gig DCI pluggable coherent solution. And today, for the last year or so that's been driving significant growth as AI continues to expand the need for bandwidth for our customers. We were also the first to market last year to announce 800-gigabit pluggable DCI cohead and module, the first in the world. We see a lot of growth available from these solutions along 2 vectors. First, there is a continued growth in the current market. You have 120-kilometer pluggable with coherent that's currently going to ship and grow at 400 gigabits and then transition over to 800 gigabits. And as that happens and as the number of data centers continues to grow in the world like Loi showed, the bandwidth between the data center continues to increase. There's going to be a tailwind of units driven by more content as we go to higher speeds that's going to help us double the size of the SAM of the existing market. But you have a whole new market being enabled here. Currently, the products we have shipping today would only go up to over 120 kilometers of reach. For the longer distances, hundreds of kilometers up to 1,000 kilometers, customers use these large boxes that take tons of power and cost a lot. And Marvell has been able to come up with new technology, PCS technology, probabilistic constellation shaping that enables these pluggable modules to now extend their reach from 100 kilometers to a 1,000 kilometers. And our customers are going to do exactly the same as they did for the shorter DCI links few years ago. As these 800 gig links go to higher speeds, our customers are going to remove these network boxes and to place them with pluggable silicon. And this opens up another $1 billion market for Marvell. And this is technology we've demonstrated already at OFC earlier this year. It's available today. So as you have seen, there is a huge amount of growth opportunity, very exciting opportunities in front of us. Inside the data center for the back-end and front-end networks, new market in the AECs and then significantly growing markets in the DCI. But as this AI interconnect continues to grow, like any other cutting-edge technology, sometimes you need something completely different. And so this AI networks are creating the need for a completely new kind of interconnect technology. Think of these clusters that are today thousands or tens of thousands of GPUs within a building. As these grow to hundreds of thousands of GPUs and TPU clusters, compute clusters or even 1 million compute clusters, and to create a flat, low latency network that you need today, you need huge physical distances to create these networks. So now what you need to do is to have a much larger data center building than what you have today or you had to break up the physical building into multiple buildings within the same campus, creating logically, making it look like just one data center. So the links, distance that they're needed for these much, much larger clusters grows from less than 2 kilometers to somewhere in the 10 to 20-kilometer reach. You now need an interconnect that gives you the distance characteristics of coherent but still looks to our customers from a TCO latency power perspective like a PAM link. You need to bring these 2 technologies together, 2 technologies that Marvell is a leader on, 2 technologies that only Marvell has today and create inside the data center coherent. And that is what we've been working with our customers for as they look forward for a few generations to create these very large clusters. And in the second half of this year, we will be sampling the world's first inside the data center coherent product. What you have seen today is a complete interconnect portfolio, with Marvell being the only company to provide this to our customers. You have PAM, you have coherent, you have a combination of that. You have DSPs and TIA and drivers and silicon photonics. And we provide a complete platform for our customers, a complete solution from 200 gigabits to 1.6 terabits and beyond, from 1 meter links to 1,000-kilometer links and beyond. And what our customers are looking for today in this rapidly evolving field of AI is partners that have the breadth of technology that has the expertise and that have the scale to help them implement all these networks. And this combination a few years ago of Marvell and Inphi give us exactly the technology base, their expertise and that scale. So with all of these growth vectors today, you have growth -- significant growth inside the data center in optical. You have new markets like long distance, DCI and AECs. We have the growth in the shorter distance AEC and DCI links and new interconnect technology coming up. We expect that this opportunity for Marvell that was about $3.5 billion last year will grow to over $11 billion in the next 5 years. Thank you.

Welcome back to the stage Executive Vice President and General Manager, Cloud Optics, Loi Nguyen.

Hi everybody, it's me again. My second act for the day. So I'm going to talk to you about silicon photonics. It's a subject very dear to my heart. I started the group 10 years ago, while I was at Inphi. So what is silicon photonics? It is integrated circuit for optics that's as simple as that. So before we go there, let's take a look to see how optical module being built today. So you heard from Achyut about the TIA, the driver, the DSPs, all of that stuff. Electronic has had been tremendously since the invention of integrated circuit 64 years ago. But optics pretty much is still being optic using piece parts. On the optics that are connecting all the data centers together outside, inside AI are still being built predominantly using discrete components in small indium phosphide fabs and it is hard to scale. So today, well, let's go back. And a few years ago, there are many, many different kinds of lasers. You get -- let's start with LEDs and VCSELs and DML, a bunch of other stuff. But as you get to 200 gig per second on a single laser as of today and we speak today, only one laser remains as commercially viable. It's going to EML laser. EML stands for electron absorption modulator laser. I know it's a mouthful. It's been around for a long time. And actually, when I was the graduate, even I make these things. It was [ you ] for longer distance like 10 kilometers or so links originally for base stations and other things. But as the speeds continue to go up, some of the other technology, laser technology cannot keep up. So today, EML is the #1 choice for discrete laser for the next generation 1.6T optical module. EML is expensive. And that's one -- and also not only that. Capacity constraint is one of the factors that's impacting the scaling of optical interconnect in data center, there's a constraint on capacity for e-mail and people are investing in it. But it is a discrete solution. So how do we hope to change them? So in silicon photonics, we do not use high-speed EML laser. We use what we call a light bond or CW laser. CW laser is like light bond and here, it's just sign of concept light. So it's easier to be made. It is available for multiple sources and it's low cost. All of the magic -- high sweet magic, how to modulate data and stuff happening inside the silicon photonic chip itself. And so the silicon photonic is an integrated circuit that has some high speed modulator, the laser, the high-speed detector, the detector come for free and all the other function couplers and so on to manipulate light inside the piece of silicon. And the good thing is, it is being manufactured by high-volume [indiscernible] on 200-millimeter or 300-millimeter wafers. So silicon photonic can scale with volume. Silicon photonics is now a really hot technology. When we were at OFC 2 weeks ago, everybody claimed they have silicon photonics. And also demo happening on the show floor everywhere. But few companies actually been able to ship silicon photonic in volume. Marvell has done that. We've done that for the last nearly 10 years, like Achyut talked about the various products in DCI networks. We have proven that silicon photonic can be manufactured at scale and being used in mission-critical application, connecting data center to data center in the DCI networks, okay? So now with AI driving a lot of demand for high bandwidth and for scaling, the time we believe is now to bring silicon photonic inside data center and completely changed the landscape of how optical interconnect is being made. The choice comes out to discrete piece parts versus integrated solution. On the discrete solution using EML laser today, you need a set of 8 200-gig for laser. So you need 8, a set of 8 laser-diode for the detector, a bunch of different piece parts. You need a lens to focus a laser under the fiber. You need isolator, you need capacitor, new resistors. You need a lot of piece parts just like the old day when we -- when we build discrete component using capacitor and resistor and transistor. All you do -- what you use the integrated approach on the SiPho 1, the beauty of the SiPho being integrated such that you can share the lasers with -- so in this case, a channel in a single silicon photonic chip. We share one laser for 4 channels. So we already need 2 lasers for a 1.6T platonic module. Lower cost, few lasers, high integration means more reliability and better scaling. And then, of course, you still need a DSP to go -- to complete the chipset, but that's really the choice. We believe that historically, when technology get developed and there's a [indiscernible] for the market and the customer for it, integration will always win. So 2 weeks ago, Marvell surprised a lot of people by announcing and doing a live demo actually of what we call a 3D SiPho engine. It is a very highly integrated circuit on optic silicon photonic, consisting of 32 channels of transmit and receive. Each at 200 gig electrical and optical. So this is the first, [ deep on ] first 6.4 terabytes, silicon photonic, 200 gig per lane that has been demonstrated. This device integrate a hundreds of components on the chips, all of the piece parts that are needed in a comparable 6.4T -- if you can ever build a 6.4T using discrete solutions. We also use advanced 3D integration to integrate also the transimpedance amplifier and the modulator -- the driver on the same device. And the design is modular, so we could scale this technology from 1.6T to 3.2 to 4.8 and 6.4T. So we demonstrated 4 extra bandwidth of the highest bandwidth optical module today, and with the integration, silicon photonic die dropping, cost dropping rapidly as the bandwidth goes up because the cost is calculated as a cost per bit. So when you double a bandwidth, the die doesn't double. So the cost of silicon photonic dropped rapidly as you can do the scale. So here is the more detailed block diagram that showed how much we integrate on this chip. With 32 channel -- 32 channel received and [indiscernible] all right? So where do we see the use case for this technology? It's really just a technology platform that we developed, that we see multiple used cases across the optical interconnect landscape. The most and immediate near term are to put a 3D cycle engine inside a pluggable module. Our customers love pluggable. Pluggable optic is what enabled the industry's scale today and continue to scale for many, many more years. Today, it would do discrete solution, the maximum number of optical channels that you can probably jam into a small module like [indiscernible] 8 channels. With our 3D SiPho engine approach, you could put 16 channels, 32 channel, even 64 channel, if we make the die smaller. The scaling of silicon photonic will enable pluggable optics to stay for many more years to come. So number one is pluggable optics. Number two, what -- I've been working on this field for many, many years, I told you before. 10 years ago, when we start silicon photonic and Inphi, we thought actually the real application will call [indiscernible] optics. That's what we were doing for. It was -- at the time it was -- people were telling us that at 400 gig, you cannot do a pluggable optic. You need to go back as optics. That's how we started. But clearly, we realize that, no, no the pluggable optic you've got to come to me for a long time. So we sell the project. We have given to so many different iterations but go back as optic is still out there. And so we want to make sure that you all know that at Marvell, we have the fundamental technology to do silicon photonic. And better yet, our 3D SiPho engine is already doing today, 200 gig per lane, not the 100 gig that you've seen from others. We do not think that at 100 gig per lane, you need silicon photonic. Pluggable optic is just fine. The world has shown that 100 gig per lane, the world have been shipping millions and millions of pluggable optics who needs to go back to the optic. So this is something that we will be continuing to work for, work on and at some point in the future, we may be need it, and that's what it's for. The third area of application, which also a little further, but it's something that's really exciting to me is how to bring optical integrated circuit into working with AI accelerator. And as you will hear from my colleague, Gregor, we're building custom compute. And the bandwidth of these AI accelerator is going up very rapidly. Every generation, it double every regeneration. Today, it is being used -- being connected over compute fabric over copper tracers and copper tracers are fine. They're good. They're at their low cost, [indiscernible]. But at some point, you will need more bandwidth. And you need to bring it further and that's when optics come into play. So our technology with 200 gig per bit today offer twice the number of bandwidth density I/O for optical chiplet compared to other who do 100 gig. Anyway, so we see our 3D SiPho engine as an essential building plan that will allow the scaling uptick for AI. And also, you heard from Achyut, interconnect TAM in CY28 is $11.1 billion. With silicon photonics, we slam another $3 billion on top of that. And that just really -- get me really excited to see silicon photonic going inside data center. And I hope that you enjoy the talk and you will join me in the journey to see the rise of silicon photonic for AI in data centers and optical everywhere. Thank you. Next will be Nick.

Please welcome Senior Vice President and General Manager, Network Switching, Nick Kucharewski.

Good morning. Thanks very much for being here today. So my name is Nick Kucharewski. I'm the Senior Vice President and General Manager for network switching and Marvell. Now I've been with the company for about a year, but I'm definitely not new to this market. In fact, I've been working on network switching for most of the last 25 years. See in the late 1990s, I was at Stanford at a time when the Internet boom is happening and most of my friends were either starting up or leaving to go to a startup. But at that time, I decided to focus on a new and emerging market for packet processing semiconductors that would go into the switches and routers that were forming the Internet. And about 9 years later in 2008, I found myself working on the product requirements for an early Ethernet switch that was designed and optimized for hyperscale networks. And with that product and over the next 9 years, I was involved in a series of products that ultimately define the category that we're talking about in this session. Now I stepped away from the cloud for about 6 years. But when Matt called about the Marvell opportunity, I was really excited to be involved in the next chapter of switching for cloud data center networks. And that's really what I want to talk about today. AI has triggered a rapid expansion in the market for cloud switching semiconductors. And Marvell has assembled one of the few teams in the industry who has demonstrated the capability to deliver on this class of product. The requirements for AI drive shifts in the industry road map, which create new opportunities for product innovation. And Marvell has the essential portfolio technology, which enable us to innovate and lead in the next wave of the market. So now first, let's talk a bit about the switching category. As Loi mentioned, in many cloud data centers, all of the compute is connected to itself into the Internet through a structured network of high-bandwidth switches. These switches are using industry standard protocols, specifically Ethernet to define the physical layer and the link layer and IP routing to direct those packets through the network. Now this general approach is somewhat similar to the Internet itself. But it's a really good approach because it enables the customer to build a network literally of almost any size. And they can build the network, mixing and matching products from a different generation so they can really incrementally build in certain cases. And it enables them to build their network using components from different equipment manufacturers and different semiconductor manufacturers so that they can build an architecture for their network that is specific to their application needs. This has enabled the cloud to innovate, grow and evolve very rapidly over the next -- over the last 20 years. So now expanding and extending the cloud for AI brings a new set of requirements to the network. This really comes down to one fundamental change in the way that applications are structured within the cloud. As Matt mentioned, in the past, Internet applications almost anything that you could be doing on the Internet, would be based on software broken down into micro services that would fit within the confines of a single processor and it's memory. But with AI, it's somewhat more challenging because we're talking about very large data sets, large workloads that don't necessarily fit within the confines of a single processor. So then you need to distribute the workload across multiple elements and then rely on the network to make those processors behave like a single component. This obviously requires a network with higher capacity and predictable latency because application performance is directly correlated to network performance, and a higher-performing network can ultimately lead to a more profitable AI deployment. So the most obvious impact here is the significant increase in the capacity of the cloud network built for AI. So first in the front-end network here at the top, if we were to enroll that fabric, we would see perhaps 2x to 3x as many ports allocated for each accelerated processor compared to a general-purpose processor. Now we expect that ratio to grow with each new generation of faster AI equipment. Now at the back-end network, as Loi mentioned, there's an entirely different dedicated switching fabric for the AI elements within the cluster. Now regardless of whether you're talking about Ethernet or InfiniBand for the back-end network, it represents a new total available market, and it is scaling on an entirely different growth curve from what we have seen in the cloud in the past. So now let's have a look inside the switch. Now if you were to look inside any of these switch icons here and take the box and open it up, inside you might find a single-chip multiterabit packet switch with on-chip packet buffers, on-chip route tables, on-chip instrumentation and telemetry. Basically, all of the things that are required by the cloud operator to route, observed and react to the traffic patterns happening across the network. This device happens to be one of the most complex devices and the hardest device to build in the semiconductor industry. This is because in order to enable that very high switching capacity, you require the most advanced process technology. You require a very high number of high-speed serial interfaces and it requires the right architecture, which strikes a delicate balance between feature set, high capacity, low latency and power-efficient implementation. Now in the last 10 years, a lot of companies have tried to enter the market for cloud data center network switching, but a lot of companies have failed. That's because there are only a few teams in the entire industry who have the know-how to build a product like this. And Marvell has assembled one of those teams. In 2021, Marvell acquired Innovium, who had developed a clean sheet architecture to meet the unique needs of cloud networks. Their first generation product at 12.8 terabits per second won a major design in a Tier 1 hyperscaler and is shipped into live cloud networks for the last several years. With this product, Marvell jumped into the #2 position in the 12.8 terabit per second switching category. This first generation proved that the team had the right architectural approach capable of meeting megascale requirements. And now we've proven it in our shipping in megascale data centers at high scale. This also gave Marvell the foundation to deliver on our AI switching product line. Marvell's next-generation product was developed entirely in-house with Marvell 5-nanometer core IP and Marvell's 100 gig SerDes. The product delivers 51 terabits per second of switching capacity. And if you look at the specs, objectively, it is technically superior on multiple dimensions. Now we've had good traction for the product with design wins that have expanded our customer base beyond that first generation. And the first of those customers will be shipping in production this summer. Moving forward, Marvell has combined the Innovium team with the Marvell Enterprise Ethernet Switch team, and I've shifted the priorities of the combined organization towards the data center cloud product line. In addition, we've increased our investment in core enabling IP. We've built our software and our support organization to meet hyperscale requirements and expanded our road map for next-generation products serving the cloud. In fact, as it stands today, Marvell is one of a small number of companies with the team and the portfolio of technology required to deliver a switch silicon road map over the long run. As a company, we're able to make these investments in core switching technology because it is complementary to our interconnect portfolio and our custom ASIC portfolio. A lot of those technologies you're hearing about today. Marvell has invested in advanced process technology, high-speed SerDes, advanced packaging technology and silicon photonics to enable high-density direct optics integration. Fundamentally, we have the core technology that's required to deliver on our multiyear product road map. So now let's talk about the road map. So when I'm looking at any product line strategy, I generally look for inflection points in the market. Those kind of technical shifts, which create new opportunities to define a differentiated product that can change the competitive dynamics in the market. And with the AI, we're seeing several of these. So first, let's talk about open platforms. Now in the past, it was traditionally very time consuming and expensive for a customer to design their equipment and to deploy it using more than one solution, more than one semiconductor manufacturer. And this is because it was built on proprietary networking software and that software was built to target single vendor silicon. But in the last decade, the industry has developed an open network operating system called SONiC which does for networking something similar to what Linux did for servers 20 years ago. Additionally, customers have built hardware abstraction layers and those normalize the differences in different silicon vendor implementations. These allow our customers to build new platforms very quickly than they could in the past. And this is a key point, which I really want to emphasize. This means that customers can transition to Marvell or they can adopt a multi-vendor or a second vendor silicon strategy for their networks. It really changes the dynamics. And I think that's going to be necessary because our customers don't want to necessarily be slowed down. There's too much at risk here. There's too much at stake. So having these multiple -- these multiple supplier strategy, I think, will be critical moving forward. But it's not enough to be second source. We're going to continue to innovate and continue to drive new features into the product category. We believe that the next wave of innovations will be driven from the top down from the management orchestration layer down to the network. For instance, where we'll see traffic engineering to reduce interactions across the fabric and workload awareness where the network may be involved in the decision-making of where to place computing tasks within the cloud. Finally, we see AI influencing the architecture of the network itself. In fact, in the past year, we have started to see this happen inside the compute cluster. With system partitioning and connectivity, which redraw the boundaries of the chipset. The next logical step is to take this thinking upwards in the network hierarchy to the fabric, blurring the boundaries of switching and connectivity and finding a way to repartition these large fabrics in a novel way. And here, Marvell has the end-to-end technology portfolio to enable this new category of switching products building on these concepts. So having covered the dynamics of the market and Marvell's position. Let's talk about the opportunity. So looking at the worldwide market for Ethernet data center switching, we see a $6 billion TAM in 2023. This is growing at a 15% CAGR and effectively doubling over the next 5 years. Now the market share includes both general compute and AI, and we believe that the AI portion is growing faster than the global TAM. Now in looking at this, it's important to note that a lot of the growth in the next 3 years will be driven by the product categories that we've talked about today. So Marvell is in a position to participate in this market growth going forward. And on that basis, I'm very exciting about -- I'm very excited about the market and the opportunities that lay ahead for Marvell. Our 51 terabit product begins its production ramp this summer. We have new customers for the product, which expand beyond the design win traction for the first generation. And we see a multibillion-dollar opportunity over the next several years. As we've discussed, AI is that technology inflection that can reshuffle the competitive dynamics in the market and create opportunities for disruptive new product innovations. Marvell stands well positioned with the team and a comprehensive portfolio of core technology to deliver on AI networks this year and in the next generation of the cloud fabric. So thank you very much. I appreciate your time.

Please welcome President, Products and Technologies, Raghib Hussain.

Good morning, everyone. This is exciting time isn't it. I've been waiting for this moment for a long time. In fact, my entire carrier has been about accelerated computing. Well, those of you who do not know me, I -- today, I am President of Products and Technologies at Marvell. However, 25 years ago, I co-founded Cavium with the focus on accelerated computing. So while we stand today at the dawn of this new era, dominated by accelerated computing. I am really excited to state that it is driving the needs that aligns really well with our core expertise and portfolio. So while Marvell is leading with cutting-edge connectivity technology, as explained by my colleagues, Loi, Achyut and Nick. I'm going to share with you how we are partnering with our hyperscaler customers and bringing the most optimized accelerated compute silicon to the market. It is going to drive even bigger growth for Marvell, and I invite all of you to participate in it. So let's see. Well, it's -- 25 years ago, when I did not have this school of a hair style. We made a specialized processor with a specialized hardware acceleration for networking and protocol -- security protocol acceleration. This is how Cavium was born. And this is how we pioneered industry's first accelerated compute for networking. We drove performance and efficiency for networking applications. Since then, we have been doing many accelerated compute silicon for various applications and the market. It's a large market. So let's see. Matt already shared with you how big is this market and how fast it is growing. But for me, I always believe that accelerated computing will surpass general purpose computing at some point. Well, 5 years ago, when I came to Marvell and we focus on accelerated competitive marketing, I did not expected to -- for this market to become this big and this past. However, we are focusing on custom compute, as Matt explained, because we are not building the general purpose CPUs and GPUs. This is a very exciting market because it is growing at a very fast compound annual growth. We're engaged with all the right customers, and we are very well positioned to take full advantage of this growth, which is going on. I'm going to discuss it in a lot more detail. But before we go there, let's see why custom compute. This is what Matt and I presented in 2021. Even at that time, hyperscalers were demanding custom compute because their goal all along has been to achieve the highest performance and efficiency. However, post Gen AI in the past 15-plus months, having hyperscaler is focused on optimizing every aspect of their platform because the order of magnitude of impact is much, much higher than before. It is not only achieving the highest performance, but also saving billions of dollars. What we did not talk about that the cloud also has multiple business models. So there are 3 business models in the cloud. Hyperscalers have their own internal large applications. These are some of those examples. In this case, they know every detail of this application and the underlying hardware required to process these applications. The second model is software-as-a-service or SaaS. In this model, hyperscaler offered their own SaaS application as well as third-party SaaS applications to -- for their customers. This is the fastest growing market driven by Gen AI, especially when the enterprise applications are moving into the cloud. For this, hyperscaler know their application very well, obviously, but have limited visibility on the third-party application. The third category is Infrastructure as a Service. These are some of the examples. In this case, hyperscaler provide on-demand -- on-customer demand, the hardware compute resources. In this case, they do not have any control over the application and they just provide the hardware platform. Now driven by the demand of the AI, there are days going on right now where every hyperscaler is deploying whatever is available to increase their compute -- accreted compute capacity. However, their desire is always to deploy custom compute as much as possible for as many applications because this is how they improve their TCO. So for the internal application and for their own SaaS, hyperscalers have already started deploying custom compute platform. However, as they establish their own custom compute platform and software ecosystem, they are going to offer that for third-party SaaS as well as Infrastructure as a Service, probably at a better TCO and customer will have a choice. So while there's a whole spectrum of adoption or custom compute in these business model, hyperscaler will ultimately succeed to deploy custom compute for all of these business models. We are in the initial innings at the moment. And there's a lot of growth in front of these -- in front of us. In summary, all of these business dynamics will drive the demand for custom compute even more. And we will -- it is a huge upside for Marvell as we participate with our customers in this growth. So let's see what -- why hyperscaler actually partner with us. Matt showed you this that we have established ourselves as a leaders through our investment in the process node, critical IP as well as package technologies. We have invested for years, actually for decades in this IP and we have proven all these IPs in using in our own infrastructure products. And most importantly, hyperscaler partner with us because we have decades of experience and expertise doing these large radical site, complex compute silicon. In addition, there's another thing going on in the industry, driven by Gen AI. Hyperscaler have a desire to increase the cadence of development of their own product. And the reason for that is that these are very expensive, very complex product and has required different technologies like -- for example, [indiscernible] their own algorithm development, the critical IP, the package technology, the memory -- high-bandwidth memory technology and so on. And each one of these technologies have their own cadence. So that is why as soon as one of these things get a new technology, hyperscalers would like to do another variant of the chip to achieve the highest possible performance and the best TCO because once again, the impact of the magnitude of savings in this market is huge. So for example, right now, we are ramping 5-nanometer, and we are developing on 3-nanometer. And at the same time, we are doing the critical IP that we do test chip on 2-nanometer. That is why hyperscaler wants to partner with the semiconductor company, which has a scale to do all these things in parallel but also capability to invest in it and probably the overall platform of their own products to be able to drive the critical technologies and gain the expertise and stay at the top of state-of-the-art technology. So let's double-click a little bit in that. If you look at this chart, each one of these critical IPs are very, very complex by itself. Each one of us have the required a lot of expertise and experience to develop it. But that is not the challenge. The challenge is that by the time the world knows this technology exists, it is already too late. What is needed is to do what has not been done before. In fact, just implementing the existing technology is not a great thing here. This is where you need expertise. And right industry knowledge and access to technology to push the limits of what can be done. It's not -- so this is how hyperscaler judge when you -- when somebody wants to work with them. They want to know that you have done investment in advance and prepare all these IPs because by the time you engage in design, the choices of the architecture depends on the availability of these critical IPs and packages and et cetera. So if you do have those things, they really cannot engage with you. So as a result of that, all these things has to be done in advance. In addition, through our expertise and experience, decades of experience, we have developed internal tools. This is -- these are the tools that helps us to achieve the highest performance and most optimized power and area for our silicon. And this is a result of decades of our experience through our own experience, working with our partners, working with our customers. This is a summary of all the learning. And this plays a critical role because again -- once again, the goal is to achieve the highest performance and the lowest TCO. These tools help our hyperscale customer to model their choices and pick the best combination to achieve the best product. Many of these IPs and technology require a specialized skill set and expertise that are really hard to find. Because of the size of the investment, of unneeded and hard to find resource team, which are needed. It is really difficult for our ASIC house, to be a right partner in this business model. That is why when hyperscaler look for the partner, they are looking for a semiconductor partner once again, which has right product portfolio and right type of capability and team to invest in it. So let's double click a little bit about the expertise and experience. In 1990s, building silicon was very simple. It used to have 1 million transistor, about 1 million transistors, and it was very easy to do. Now today's high-end compute is a very complex multi-chip module, actually. And many of these chips are reticle size. It's a completely different ball game. You really have to have all the expertise and IPs in-house. The reason is that you can't depend on the third party, you can't on the -- and you can't outsource these things because the pace is really high. You can't really say, "Hey, I'll haul just some contractors and I'll get it done". It doesn't work that way. We need to implement these cutting-edge products and in a very fast pace and ship and production and volume production with a very high yield with a very short time. We are pushing limits of -- physical limits of everything in this area. So for example, 5 years ago, when we acquired Avera, and we went out to the customer said, hey, we want to be your partner for this customer. The discussion started, okay, well, we want the highest performance, we want the best yield, we want the best schedule. Have you done it? How many reticle-size chips have you done in your life? Do you know how to do -- how to close timing for that? Do you know how to do these multichip modules, how many 2.5D/3D packages have you done? Do we have all those IP -- critical IP in-house or not? Do you even know what does it take to implement those IPs? So have you done mechanical and electrical test vehicles for your packages. How do I trust you that when I come up with a chip, this package will really work? Have you done your homework? Well, our decades of expertise and experience, combined with our investment in the critical IP and package technology is what started the dialogue. Since then, we are working -- we have been working with our customer partner, and we are building the high-performance compute solutions. So let's see, how did we build these capabilities and expertise. When me focus on this custom compute business 5 years ago, we knew we have to double down. We have to become the leader in process now it's critical IP, packaging technology. For that, we needed the scale, and we had to bring additional expertise. This is where we bought -- we acquired a bunch of companies. But it was not a random whatever is available thought. It was a very thoughtful process what component, what IP, what capability do we need and we had to combine all of them to make this beautiful platform. These companies brought critical -- not only broad critical IP and technologies to our platform. But it brought a decade of experience and expertise, and most importantly, highly skilled engineers and scientists. For example, to do all those complex SerDes, we all know that we need a large team because you have to do all these things in parallel. So how did we build that large SerDes team? We combined Marvell SerDes team with Aquantia SerDes team, with Avera SerDes team and Inphi SerDes team, and that's how we build a large experienced SerDes team, and that's what is delivering the product that we have. Similarly, we knew that we need to do the similar thing in -- for custom silicon and then for packaging. This is where we combine Marvell expertise of packaging, along with Avera and Cavium expertise of the packaging as well as Inphi. Inphi also brought optical capability, very critical, again, for this market and which give us a very broad set of complex IPs as well as capabilities. So in summary, in the last 6 years through organic and inorganic, but very thoughtful investment. We have built a portfolio of critical IP and expertise and a very large team, which is needed to be capable player in this market. So let's see how -- what have we been doing? May I talk about we have various -- we have a lot of opportunities in data center. Now I'm really proud to share with you today that we have custom silicon products in each one of these areas. They are either ramping this year or are going to ramp in production in the next 12 months. As you can see, we do not just do one thing for one application. Our relationship with our hyperscaler partner is completely different. We are not an ASIC design house. We are design partners, we work closely with our customer partners to come up with the solution. And we build with them whatever the pieces of the products are needed. This gives us many, many shots on the goal. All these designs will drive growth for Marvell and create value for our customers as well as shareholders. So as I said, building these complex compute is not easy. So I just wanted to walk you through some more technical details to explain how we are different than many wannabes. So for example, you may have heard a lot of people out there say, "Hey, we can take third-party IP, and we can build high-performance compute chip." Well, I do not blame them because you don't know what you don't know. I have only one question that how many reticle-size high-performance compute chip have they build. And it's not only about build, have they taken in production and volume production with high yield? And that is what is needed to do these kind of things. So let me walk you through. So we take a third party, for example, ARM core, but then we optimize it for power, for area, for performance because this is going to be a building block for high-end processor. And because we put lots of them, so chips performance is going to depend on how good optimized core it is. But then it's not only about the core. We -- the performance of the chip depend, how well do you connect them. So the interconnect, which is a cache-coherent interconnect, the bandwidth and the capability of this interconnect is very critical for the performance. This is where we build our own interconnect mechanism not only for the data. We -- how do you distribute clock, how do you do power distribution, all those things are critical for the performance of the chip. This is where our recipes and experience comes into the picture. This interconnect that we have is the best in the industry, which gives us the best scaling. I still remember when we built our first 16-core processor 20 years ago at Cavium, we could get 16x processor. And then there -- you all know, there were many wannabes who did 8, 10, 12 cores processor, which never scale. And this is where the decades of experience is at work to achieve the highest performance. Another aspect of this compute chip performance is the memory bandwidth. This is where we design our own high-bandwidth interface, and this is how connecting this for the outside world, this is how we build a compute die. Now often, you need performance more than what you can fit in a single reticle-size die. And that is why we put two of them together. But the key here is, as we connect them together with a very high bandwidth, die-to-die interconnect with its cache coherent, so that this whole -- and then we use the same die-to-die interconnect with the IOs as well so that this whole system looks like a single entity. In fact, it is so seamless and bandwidth is so high that from all practical point of view, software does not even know these are two -- physically two separate things. So this is how all of them together in a complex package to build this large compute silicon. And just to note, in this picture, everything which is green is ours. In fact, in all the blocks is ours, we designed it. Even the ARM core, for example, the optimized version is our IP. So while this compute silicon is very important for the AI infrastructure, you must be thinking why am I talking in so much detail about this compute silicon. Well, because it is very similar to how high-end AI accelerator chips look like. All the problems that you have to solve here is the similar problem that our processor team had been solving for decades. So let's take a look at it. This is a custom AI accelerator. Now in this case, the compute die, the algorithm, the architecture in there is what customer team develops. However, to convert it into a physical die. We have to apply all those tools, all those expertise of decades of experience that our processor team has been doing for a long time. And that's how you build that AI reticle-size die. And then once again, the die-to-die interconnect is critical here, which is the similar thing. We have to have a high bandwidth, and we have to make all these compute, whether it's a 2-die or 4-die look like as a single entity, okay? And in the case of AI, the bandwidth requirement for the memory is much, much higher. And this is where we design a special -- even the memory is being used as is special, which is HBM, but then it is also critical, how efficient is the interface through the memory itself. And this is where we design a very high bandwidth, very low power interface to this memory and which gives us a very balanced memory bandwidth with the compute. Now once again, we put all of them together on a very complex package. This is where the experience and expertise of having the mechanical and electrical test vehicles come into the play. And this -- our modular approach to separate IO and a separate memory interface actually gives a lot of benefit to our customers because then you can actually upgrade your chip, let's say, if a memory technology improved or say, if the process node changes, you can do another core die, and you can build much faster in a much reliable way a new chip. So once again, as I said earlier, all the green blocks in this picture are Marvell IP. And of course, the core die is our joint development with the customer. So Matt, already talked about our design at two large U.S. hyperscalers. These products are already ramping in production. This is really exciting as this is the result of our close collaboration and partnership with our customers. The third design is even bigger compared to previous two designs. All these engagements -- with all these engagements, we have captured a large share of custom compute market. But for me, personally, it is also a testament of our capabilities and preparedness that -- and all the critical IP that we have developed for a long time. These engagement also is exciting for me because we are not only developing critical piece of silicon for the AI infrastructure. But we are working together with a customer as a single team to solve system-level problems. So as I said earlier, our relationship with this customer is a lot different. We are not an ASIC house. We actually are co-development house. We work with the customer. We understand the architecture, we discuss architecture challenges. We actually do co-development pieces of IPs, which is needed for future development. We -- then we develop multiple silicon, multiple pieces of the silicon for the whole solution, and that's how we solve the overall system-level problem. Because these -- the value of these IPs is going to -- is the one that drive that how good of a solution you have. And this is where we are pushing the limits in every possible technology in every direction because we have understanding of many, many technology and capabilities through our own products and expertise that we have. So in other words, we are co-architecting with our customers to achieve the highest system-level performance and the best TCO because at the end of the day, that's all that matters. So this is why these relationships, these are long-term strategic partnerships, and they are multigenerational. So you always heard from Matt earlier that how infrastructure, accelerated infrastructure for AI is growing at a fast pace and how Marvell is providing connectivity switch and custom compute for AI infrastructure. We have been preparing and investing to be ready for this moment for a long time. And we are engaged with all the right customers. So Matt talked about how we had 10% share in the total data center market last year. And how we are driving to a 20% share target. But in custom compute, we had very small portion last year. Now based on all the designs that we have and customer engagement, will be at double digit soon. And overall, gaining share in custom compute will be the biggest part of getting Marvell to the 20% overall target share. This is a massive opportunity for Marvell. So I would like to say, if you want to participate in AI infrastructure buildout, Marvell is your stock. Thank you very much.

Please welcome back Senior Vice President, Investor Relations, Ashish Saran.

Thanks, Raghib. We're going to enter our Q&A session right now. So we'll give us a minute or 2 to get the set up. So if I can have all the presenters come up on to the stage in a minute and we will take questions from the audience. [Operator Instructions] All right. I think we've got some questions back right here. Let's start there.

Thanks so much for the very informative event. I actually had two questions. First on the custom ASIC side and second on the optics side. So on the custom ASIC side, you mentioned very specific targets for calendar this year and next year. I'm wondering how the visibility is beyond that? I think Raghib you mentioned something about the program could be even bigger than the -- so if you could help, we all love quantifications as much quantification you could provide right for '26 would be very helpful so we can understand how sustainable, right, the strength is in these programs? And I think on the optic side, Loi, perhaps for you, we understand the role of the DSP, right? Very, very critical. But at what point does the power consumption, latency, other things become so overwhelming that whether it is NVIDIA or somebody else. They are just forced to consider other solutions, so the '23 to '28 profile that you have provided, are you assuming any conversion over to CPO or other architectures that can help offer some power advantages versus the DSP architecture?

Two great questions that I got, and I'm going to direct traffic today, so I'll start on a few, and we'll all team up here. I'll start on the first question. I'll have Raghib add. So a couple of things on our fiscal '26 next year just to set the context for everybody on the $2.5 billion. The way you guys should think about that, is that is the base, that's the floor, that's -- to the view at this time, and I would just say look at where we were last year at this time and we started projecting out where our AI revenues could go. I mean at some point, we said $400 million last year and $800 million this year. We're already showing you $1.5 billion. So think of it that way as a starting point, and that's typically how we do it at Marvell. If you project out and you heard what Raghib said, and I'll let him add his own words, but we're looking at a custom silicon market in '28 of over $40 billion, right? And if you just sort of think about what's the math it's going to take to get Marvell overall, right, to 20% share long term, then by default, you've got to be very successful in that market, right? And so Raghib's talking about driving his business to those levels over time. So it's very significant, Vivek, in terms of what we're saying to you guys today relative to the design wins now and the production ramps we have going on today. And yes, as Raghib said and why don't you cover it a little bit. I mean, we do think that the newest opportunities are as significant or even bigger than what we've already won. So it's a big deal.

Yes. So as I mentioned during my presentation that at this point, we are -- we have design wins, which gives us visibility, multiyear visibility. And first of all, all of these are multigenerational engagements. And on top of that, the new engagements are even bigger than the one. So obviously, we talk about 20% target that Matt mentioned. And I said that during my presentation that we will be double digit pretty soon. And then obviously, the custom silicon -- custom compute is going to be a much bigger part of achieving the 20% target.

Great. And then let's on the second question, Loi, why don't you take that one?

Yes. So great question on the optic side. So in terms of power of the -- whether the power, how critical when it's going to happen and so on and so forth. Well, the first thing is as Achyut mentioned earlier, time is really the most precious commodity. Customers are wanting the solution that plug-and-play, deploy now and that can scale 800-gig now and a 1.6T pluggable is pretty much the ecosystem is gearing up to launch that product for next generation of 200-gig per lane. So from that standpoint, the linear optics and the CPO are kind of late production generation, just like what we had debated and discuss that on various panels and the workshop at OFC 2 weeks ago. That situation doesn't change. And of course, with the bandwidth going up -- continue to go up 2 weeks -- every 2 years, we need to continue to innovate. We cannot just say, oh, we're going to do the same thing and it going to double the bandwidth, double the power when you saw Achyut road map. Every time it's going up to 2x, actually, he's cutting down the power per-bit like something in the 30% or 40% or more. And so don't assume today and just multiply by the bandwidth.

Yes. I'll just add and then we can move to the next question, Vivek. I think the way -- what we said even at OFC, I said this in my keynote was, look, we do think there's a potential that some applications in some part of the market in closed systems in particular, may move to these types of approaches, right? That's fine. We are absolutely preparing for that. And just to give you a sense, at the sort of 200-gig per lane level, the ASP we can capture just on TIA driver, the analog content, not the DSP, is like the DSP content at 800-gig. So it's -- so there's still a significant ASP we can get, and we are absolutely going to prepare for that. But I think what we're trying to do, and I think we did a good job at OFC, and so did our customers and say, look, bulk of the market's going to stay pluggables. That's the way to think about it. It's insatiable demand for data. And if there are some applications that are closed and go LPO, Marvell will be there, and we'll capture content and revenue. And we're just like, hey, what does market want? What do our customers want? But we also wanted to get the industry off this bandwagon that all these DSPs were going to disappear, which was sort of what and I came up at OFC last year, which proved to be completely and patently and totally incorrect. Next question.

Right? Can we get a question from the other side of the room?

Tom O'Malley with Barclays. Thank you for hosting the day Matt and team. My first one is in relation to AEC. You talked about multiple customers. And then you showed a slide with the front end and the back end and you spend some talking about the transition to 100G per lane in the front. Can you talk about where you see the bigger opportunity for AEC? Is it when you see the front-end refresh? Or do you see the big opportunity today in the back end with some of the custom ASIC ramps. That's one. And then two, you talked about the SiPho engine. Optics, there's lot of vertical integration, it's very important for your customers. If you're at OFC, InnoLight talked about doing their own silicon photonics. How are you going to balance your progression there and some of your customers may be trying to do more themselves?

Sure. So I'll have Achyut, who take the first part on AECs. And then Loi, you can talk about SiPho and those dynamics. Go ahead Achyut?

When you talk about the back end and the front end network, that's sort of the logical differentiation in the networks. Physically, it's really a question of the distance you need to travel for the AECs. So what we see today are opportunities both in the front end and the back end network. Because all of these have to grow up in speed at the same time. You can't have a back end network that's very fast and then a bottleneck on the front end. So as all -- the network speeds, both in the front end and the back end scale, we're seeing applications for our AECs today at multiple customers, all of them using it both in the front end and in the back end. So I think you should look at this as a combined opportunity, not something that's different. Same customers that are going to deploy this AECs. Some of it will go in their back-end network and some of it will go into their front-end networks. And that's what we see from multiple customers.

Yes. Great. Thank you, Achyut. And then Loi. Yes, Tom, why don't you just repeat the second question just so we got it.

And developing silicon photonics themselves, how you balance, your custom developing their own products and your desire to further vertically integrate yourselves?

Okay. That's a great question. Marvell is a component vendor. We do what we do best. Silicon photonics is still an emerging technology, like I said, right, it's just starting. So it's not clear on who are going to be successful, who are not going to be successful. As I said in my talk, too, a lot of people say they have silicon photonics, but few companies actually have successfully commercialize shipping silicon photonics like [ XScale ] and Marvell. So we obviously will need to help our customer to build this silicon photonic and offer as a component products. And then for those who have silicon product and can scale. Of course, we will work with them to enable the scale by offering the TIAs and driver, and the DSP as a part of chip set. So it's a kind of a collaboration model, how to help to grow the industry. They're going to make the pie bigger.

Yes. And just add and we can go to the next question. The way to think about it is this stage, Tom, is -- it's completely not a zero-sum game, right? This is a brand-new urging $3 billion market that's actually very disruptive. So to Loi's point, you're going to see a lot of players. I think what we tried to articulate in our section was, look, there's a lot of talk about SiPho. I mean I went to OFC 10 years ago, SiPho was up in banner and booth, right? There's really only a couple of companies in the entire world that have shift in high volume production into data center applications with high reliability, high yield and high volume, and Marvell is one of those companies. And so we like our position as we transition this. But look, I don't -- I wouldn't get hung up on right now. If somebody has gotten and somebody doesn't. If the whole pie opens up and it can become commercially successful, $3 billion is a lot of TAM for everybody to go after. Next question.

Quinn Bolton with Needham. Two questions. Just wanted to, you guys did a great job of highlighting the opportunity of the front end and the back-end networks, but you certainly didn't address the compute fabric, which today is copper. NVIDIA a couple of weeks ago, introduced their new NVLink 5 that spans up to 576 GPUs across 8 racks. It sounds like there should be opportunity for you, whether it's AECs or perhaps Retimers to drive some of those copper links and wondering if you could address that opportunity? And the second question is on DSPs at OFC, it sounded like optical units are certainly going up, but pricing may be an issue. I just wondered if you could talk about what you're seeing on the DSP or just the pricing front in the optics business?

Yes, sure. Why don't I hand the second question to Achyut, and then you can decide if you want to answer the first one, or you and Loi want to team up on that.

Sure. So let me take the second question first. On this market like Matt said, it's a rapidly expanding market. I mean, the CAGRs on these things are huge as these cluster sizes grow. So like anything else, as the market grows, but we also move down the technology node. So enable the market, we will enable whatever degree of price flexibility is needed, but we can also keen to maintain our technical leadership, our profitability as we develop more and more cutting-edge solutions. Our customers really care about moving to the next node, the next fastest technology quicker. And that's really where we are focused on. And that's where you can really charge the premium, and you can capture a majority of the value in the market. I can start with the question on the compute fabric. When you look at the event you talked about a few weeks ago. A lot of the focus was really on trying to keep some of those links passive and developing SerDes technologies to do that. And the customers will try as hard as they can to keep doing that, you're exactly right. At some point, as the speeds will keep going up, the speed are going to double every couple of years or even faster. At some point, that math is going to break, and at some degree, they're going to have to go active, whether that happens in 1 generation or 2 generations or 3 generations. But it's going to open a significantly large market for this active electrical cable SAM at that point of time.

Great. Thank you. Next question.

Tore Svanberg from Stifel. I had a question for Raghib. Raghib, you talked about the high bandwidth memory interface being proprietary to what you do, and that's a value add. Could you maybe give us some parameters how that compares with, again, the event from a couple of weeks ago from the B200?

So as I said that, the actual goal of achieving -- putting these solutions are actually to achieve the highest bandwidth and the best power latency. And it's not as simple that, hey, you just build one and one-size-fit-all. It's a result of what overall system-level memory bandwidth you are trying to achieve combined -- which will match with the compute. So I'd like to answer your question this way. We have at this moment, the most cutting-edge technology and capabilities. And we worked closely with our customer during the architecture phase to figure out what exact interface that needs to be tuned to and that's what we build. And our goal is always to achieve the best performance and efficiency on our system.

Great. We got some questions up front here, Carmen.

Thanks so much, Chris Rolland, Susquehanna. Thanks for this great day. This might be for Loi, but Matt, I'll let you decide. But -- so there's a lot of a discussion about scaling out cluster sizes. And my question is what effect does this have on optics attached per GPU? Do we go from two to three to four. We're talking about cluster sizes of perhaps 1 million GPUs as well? And then secondly, in your slide, you talked -- well, you showed that it's really training that looks like it's more scale out. And so if we have a move to inference, does that slow the rate? Or how would you expect that attach for inference to change over time as well?

Great. I think it's a great question for Loi.

Yes. So that's a great question. So on the same chart that I show you, right? I span the cluster side from 128 to 1 million, right? Today, 128 to 25,000 is the kind of cluster that we can build. So for inference machine, as it's also depending on what you're trying to do to try to do with inference machine. The inference machine could vary from 100G accelerator to 1,000 to 10,000. So it's an average that on 1-1 on a small size and 2-1 or even 3-1 on the large size. But, so if you just look at the rate of optic to XPU, that's really related to what the side, right? And in terms of total number, absolute number, you need to take a product. The product of the size of a cluster, the ratio and how many of them are being deployed. Today, what we see is the both training and inference driving massive amount of interconnects.

Great. Next question.

Ross Seymore from Deutsche Bank. I actually have a question on the custom compute business model and how that may be changing. Everybody knows the revenues are huge. You've talked about those TAMs, the gross margins are lower, the operating margins are higher. But given the competitive environment, the complexity of your products, the co-development house, not an ASIC house side of things. What are the trends in the gross margin side of that? Are they actually getting better over time, given these relationships because one of the big fears we hear is it will be great on the revenue side, but the margins might be a bit dilutive and what does that mean to the stock, et cetera. So I would think in this AI generation, there could be some changes in that business model that either Matt, you or even Willem might want to discuss.

Yes. Yes, I'll give a couple of comments, and I'll have Willem chime in as well. We've gotten this question for some time. And obviously, as the ASIC opportunity and the custom becomes larger. It certainly would be top of mind. I think the first thing is just to be clear and we set it up on but we're not changing the financial model at this point, right, we still feel very good about the model we have long term, when you project out and you've got a $40-something billion custom compute TAM, and if we can capture a significant portion, that would change the dynamic because that -- from the very beginning, when we acquired Avera, we always said the custom business would carry a lower gross margin than the merchant type products, but the operating margins actually would be about on par over time because remember, we get NRE where customers are paying us to develop these products, and so that provides an offset. And ultimately, kind of the operating margin and the EPS line is on par, although if you get to this kind of scale, then obviously, the EPS fall-through is like massive, right, because you're just on so much more volume. So that's how we think about it. I mean maybe you add a couple of more thoughts. But because I think there's mechanisms we have to also give you guys some clarity around that too.

Yes, I think the way we look at this, right? It's -- clearly, as Matt outlined when you go back in the past we always had a mix where we expected growth in custom, right, that was always contemplated in the model. But as you go forward and it becomes a way more significant part of our business, what we're looking to do is actually break it out for you guys so that you can see the core business and that strong margin. And then as Matt outlined on the custom side and the leverage we're getting good operating margin and all the EPS. So, in the future, as it becomes way more significant for us and way more material, you should look for us to break it out for you guys so you have that visibility.

Yes, there's no current plans to do that, but just -- since that's the feeling and the questions, right, I just think it's appropriate to let you guys know, we're mindful of that dynamic and would want to provide that clarity to investors. In particular, I think, not so much, well, what's the margin on the ASIC and custom side because that's kind of an industry benchmark, but rather, hey, as core business, are you really maintaining your profitability there? Is it really commanding best-in-class margins? Are you really getting paid for engineering? And we're obviously very -- we already watch that ourselves, right? And that side of the business is doing great, and we'll continue to do right. You saw all the innovation we're driving. But if that's helpful over time to investors, certainly, we would provide it to make sure you guys have the necessary information. All right. Next question. Ashish you want to direct them.

We can maybe go up front here.

Yes. To Harlan.

Harlan Sur with JPMorgan. First off, congrats to the team for bringing Axion to the market with your large cloud hyperscale customer. I mean that's CPU performance is pretty incredible. But my question for Raghib is that if you look at Customer A, and Customers C. They've had a track record of doing all of their chips in-house, right? And so like this inflection point has come where all of a sudden now, they're feeling the need to partner up with Marvell or maybe some of your other accelerated compute ASIC competitors out there. Is that being driven by a lot of the things they talk about, which is the complexity increase is going up so much, the specialized IP requirements are going up such that their internal teams just can't deal with the complexity. They don't have the IP capability. They don't have the architectural like expertise. And is this a trend that given the complexity increase, like, is this a trend that continues going forward? In other words, guys that used to do COT over time, it's going to continue to engage more and more with Marvell because they just don't have all of this expertise in portfolio.

Yes. Let me frame it first and then Raghib you can chime in. So I think it's a great way to summarize a lot of what you talked about. I'd say at the first level, the way we're going to cover these types of questions is like one layer of abstraction higher, right, given the sensitivity of all these customers and who might be A and B and C and so on and so forth. I think asking the absolute right question, which I think you should summarize, which is why? When would you go COT, when would you go meet our services? What's the differentiation? And why are we seeing that trend continue because we actually think, as we showed in our TAM analysis bigger chunk of the TAM is going to move towards system. By the way, some of that will be COT in there. There's no question, right? Some of that will be COT. But even within that, we think we can get a significant share. So why don't I let you answer it at the why level, right, versus the individual...

Thank you, Matt. I thought I tried to clarify it very well during my presentation, but here I go again. So the thing is that you have to keep in mind it's not like past. First of all, this is not ASIC business period. Which means you should pretty much forget about all other players, maybe a few large semiconductor companies have the right capabilities, right IPs and right scale to be able to do it. They, all of them may not be doing the kind of partnership because they may have their own internal product, which competes with this thing, and that's why they will never do it. So that brings it down to really the company, right? So then on top of that. So not only, if you need to build a chip with existing IPs, yes, you can build it, many people can build it. What I tried to explain in this case, you are pushing the limits in every direction. In performance, in technology, and you are actually sitting with the scientist on the other side and really try to understand what is the problem that we are trying to solve. How would best fit all these complex tons of silicon on a single kind of complex package. How would we really manage this whole power and thermal as well as signal integrity and all that. So that actually requires to develop a lot of new IPs in every generation. And that IP housing doesn't do that. So actually, they have no clue what is needed. In fact, they follow once things are done, and that's what every IP house does it, right? So this is why these relationships are going to be more and more critical. And it's not about whether those companies have their internal capabilities or not? Because I explained you that the cadence is increasing a lot more, right? So if anyone -- I mean just to give you an idea, the amount of cost of, let's say, the package versus the memory versus the chip itself in these complex silicon is all pretty much equal, right? So if I can come up with a better memory technology, memory technology improved in the industry. It extends to quickly upgrade that and get better performance and overall but a TCO. So it's not about who can do what, only. It's about what scale do you have. And this is where these partnerships are becoming much, much more important and much, much more closer. That's why I explained during my presentation. We are not ASIC house. To be very clear. We are not as ASIC house. What we do is we do co-development, co-design, and we are a true partner of our customers to bring the best of the class highest performance, most optimized TCO products to the market. And that is what my mission is, and that's what we are doing.

Yes. Fantastic. All right. Next question?

Maybe something at the back.

Yes. It's Chris Caso from Wolfe Research. So two quick questions. One is on some of what you provided for your fiscal '28 and some of the share assumptions you had there. One of the assumptions you had was maintaining share in interconnect. Can you, I think there's maybe a little bit more to that there that perhaps you can explain. You have very high share in DSP now, but there are some new products you spoke about active cables, for example. So can you speak about what your assumptions on there? And then secondly, if you could touch on co-packaged optics a bit, and you mentioned in the presentation, but kind of about timing and applicability of that?

Sure. Yes, I'll start off on those and then I may have Loi comment on the second. Yes, on the interconnect one, I think the way to think about it is, it was easier to set a base case is maintained because as you exactly pointed out, we have very high share today on DSPs. There's some emerging product categories, right? So maybe over time, those may be significant we may gain more share in those, but they're still a smaller part of the total. So seeing a gain share to us at this point seemed a little off, like how are you getting share when you've already got so much. So I think it's just better to assume kind of keep it where it is, which would be high share still on the DSP side. Maybe it comes down a little bit over time. And we keep saying that. In fact, I think when we we're acquiring Inphi, Loi. They said, well, it's really high now, but eventually it's going to come down and then it just sort of never happened. But I think we just said we have a leadership position there, just assume it would be a hard claim to say it's going to get any bigger. Okay. And then on the second one I mean Loi teed it up, which was like he founded the Optics Group, at Inphi 10 years ago, right, to go do CPO and here we are in 2024, and there's nothing shipping, right? And in fact at OFC, in my keynote, I made a statement because I got asked about this too. And I said my experience was CPO was always N-plus 2 years away, with N being the current year and it keeps rolling. And then, in fact, after me, one of the senior fellows from our biggest customer got up and said, actually, my experience -- first of all, Matt's being too polite. He's a very polite person, it's N-plus 15 years is my experience because when I joined Google 15 years ago, that's what we were working on and it never went anywhere. So we keep an eye on it. I think Loi said it beautifully. I mean, we absolutely have the team to go do it. We have the switch capability from Nick. It's not like we're ignoring it. But we just don't see that pull right now from the customers base to really do it. So it's always going to be on the road map, and we're going to be on it. But right now, we don't see that in the horizon as being a volume type of application. Next question.

I think we'll take the last question, we're on time, so let's go ahead.

C.J. Muse with Cantor. A couple of questions on custom silicon. So first one, you've targeted or announced 3 U.S. hyperscalers. Can you speak to your willingness to support China? And as part of that, can you give us an update how you're thinking and approaching vertically integrated players? Any sort of update there in terms of maybe different workloads and what opportunities you could see over time? And then a larger question around the workload side of things. As you're trying to get wins today to ramp in '26, '27 and beyond, are you seeing any meaningful changes in workloads or/and what the focus is and what the requirements are within compute?

Okay. Let me do the first one. I actually didn't catch the second part, like as much. So on the first one, with respect to China, our approach has been in that market for several years that we support our Chinese customers, but with merchant products. So our custom offerings there generally have been very limited. And I think in light of all the restrictions that have gone on from the U.S. government doing very high-end sophisticated AI chips and advance of the technologies, just presents a risk factor that's probably too challenging for us. And so we've really doubled down both on the U.S. hyperscaler, certainly on the custom side, but then also enabling our merchant products, both directly and through OEMs globally, okay? So we can still address, for example, part of the China hyperscale market, but that could be merchant parts or that could be through OEMs that sell a platform into there. So I hope that's helpful.

Yes, I think the second part C.J. were you trying to ask whether there's opportunities outside of cloud essentially in vertically integrated, is kind of the question? So vertically integrated players. And I think the reality is you see such a big TAM right now with the cloud customers, and that's where we see biggest traction, as Raghib talked about, customers see, that's an even bigger opportunity, which we already won compared to what we are shipping in the next few years. I think if there is opportunities where some of the vertical integrated players together want their own customers and as their scale becomes bigger, I think we'll obsoletely be in play. But the reality is right now, there's so much happening just with the large cloud customers.

So I think Raghib wanted to add and then maybe I'll say a few closing comments. And we got lunch skewed up outside for everybody will be separated in the nice tables. You can be members of the management team. But...

Yes, yes. So I think, as Ashish already covered that we are engaged pretty much who is -- who are there. So we keep a very close pulse on these things. And in fact, as I said, it's not like there are 10 such providers. So even those people know when they need help who to go to. So as the right opportunity comes, of course, we are always engaged with all of them.

Yes. So again, just to wrap it up. I appreciate all the great comments. I appreciate everybody coming in to attend our AI event today. I just want to summarize it, by saying look, we have a $75 billion TAM opportunity at Marvell sitting in front of us, hanging out there. We've already got 10% of this market today. It's going to grow that share, by the way, in the current year we are because you can see our ramps we're having in data center. It's going to grow again as a percent of total next year. So we're already on the path marching towards this 20%. And so we try to provide you guys enough information because you're going to have your own model. You're going to have your own point of view. This is a very explosive, very dynamic situation. So plug-in your own numbers, right, plugging your own numbers, figure out where you want to take in terms of the market, but just to finish on this, we are absolutely confident this management team, this company that we can drive the share gains that we've talked about and be successful. So the question is, how big is the opportunity going to be? And you guys have better models than us probably. So good luck and we'll see at lunch. Thank you.