Rambus Inc. (RMBS) Earnings Call Transcript & Summary

Good morning. My name is Dong Simon-je. I'm from the U.S. semi and semi equipment team here at Bank of America. I'm very delighted to host Luc Seraphin, Chief Executive Officer; Desmond Lynch, Chief Financial Officer, of the Rambus Inc. Welcome.

Thank you.

Thank you.

Did you have any very interesting comments you had to make about the safe harbor?

Yes. So as usual, we encourage people to understand our safe harbor about forward-looking statements and to read also all the official statements we have on the 10-Q and 10-Ks where you can find a lot of interesting information as well about the company. This being said, now we can move into questions.

Sounds good. So just for those unfamiliar, would you mind starting off with a brief company overview, your history, how you got here, your main growth drivers.

Sure. So Rambus has created about 30 years ago, and it was created on the basis of developing the foundational technology used for memory interfacing. It's as simple as that. So every processor or every memory actually uses is that fundamental technology that we have developed. We started the business as a patent licensing business 30 years ago. But over time, we have evolved our business model. We continue to have a solid patent licensing activity as part of our business. But over time, we have developed memory interfaces and high-speed interfaces based on that foundational technology. That's a silicon IP business where we sell Silicon IP to semiconductor companies, those semiconductor companies integrate those blocks into their SoCs, and then sell those SoCs to their customers. That Silicon IP business represents today about $100 million -- more than $100 million of revenue when the patent licensing is about $200 million. And then we evolved into actually developing chips that we sell to the memory vendors, mostly Samsung, SK Hynix and Micron. They integrate those chips onto their memory modules and they sell those memory modules to the hyperscalers and the enterprise customers. That chip business is the fastest growth business for us. We started very small. In 2018, it was $38 million. Last year, it was about $225 million. So very high growth in that business. So that's who we are. We focus on data center mostly. We focus on memory interface and security, which we can talk about a bit later. And we go to market in 3 ways: Patent licensing; silicon IP, where we sell a predefined IP to semiconductor companies; and chips that we sell to the memory module vendors.

Sounds good. We tend to focus on the chips business first. So this is your newest efforts, especially a lot of focus on the interface chips as well. Can you give us a sense of how large the market is today, your positioning and potentially your advantages over competitors?

Sure. So the -- we sell those chips to the memory vendors and these memory vendors integrate those chips on the DRAM modules. So that's what we do. The market for those chips last year was about $750 million, $770 million in size. That is a market last year that declined over the prior year. And one of the reasons was a DDR4 inventory digestion in the market, so inventory digestion in prior generation but also some CapEx with direction to AI servers. So the market went down last year, and it was about $750 million in size. We expect the market to rebound this year. We need to high single-digit growth. And our position in the market is we were in the DDR4 generation above 20% market share. When the market is moving to DDR5, our market share in DDR5 is around 40% share today. So that transition of the market from DDR4 memory to DDR5 memory has been a catalyst for us to grow our share in that market.

Alongside that discussion of the transition, how far along are we in that DDR4, DDR5 today?

So we're far along now. I think the DDR4 launch in the market took time. There are many reasons for that. This is a very small ecosystem in terms of number of key players but very large in terms of size. So when the whole industry has to move from one generation to the next, all memory vendors have to be ready with DDR5, all processing vendors have to be ready with the DDR5 enabled processors, and all the buffer chip vendors like us have to be ready at the same time. And everyone has to align for the market to transition. So that transition took time but it has transitioned in earnest now. We're well into it. We are shipping 3 generations of DDR5 at different stages of qualification or production to our customers. And we're still working on the end of the inventory digestion on DDR4. So that transition is well engaged at this point in time.

Could you talk more about the unit and content opportunities for 3 generation of DDR5 products?

In terms of content, when the industry move from DDR4 modules to DDR5 modules, they also changed the architecture of that module. One of the advantages that DDR5 brings is more capacity and more bandwidth. But at the same time, it means that the complexity of that module is increasing. So because that complexity is increasing, the industry decided to move some functions that were sitting on the motherboard in the DDR4 generation onto the modules in the DDR5 generation. So that means that the DDR5 module contains more ships than the DDR4 generation in addition to the DRAM. And those chips, we call them companion chips. And the 3 types of companionships an SPD Hub, which is a communication chip, temperature sensors and power management chips, that fact that we're moving those chips onto the module adds to the TAM that we're addressing. So earlier, we said the market last year was about $750 million for the RCD chip only. The companion chip TAM in total added about $600 million of additional content onto the module. So that's a growth -- really a growth vector for us.

I think you've previously mentioned that those chips had about a couple of dollars of content. Do you still kind of see that similar zip code of content addition?

Yes. The way we look at it, as we said, if you take an RCD chip, which is what we do last year, growing mid- to high single digit this year. We add $600 million to that time. So that gives you an idea of the additional dollar content, $750 million, growing mid- to high single digit on the RCD, you add $600 million of content for the TAM to this market with the companion chips.

Sounds good. We also touched about the PMIC business. This is relatively new. You're expecting some revenue in the second half, I think, ramping into next year. How should we think about your positioning in this market? How are you differentiated against the existing offerings?

Yes. So that's a good question. So the PMIC is part of what we call the companion chip. So when I talked about that companion chips, one of these companion chips is the PMIC chip became late to the PMIC market. But we believe this is going to be a very important growth driver for us. And we did this deliberately. When the market transition from DDR4 to DDR5, our #1 priority was to make sure that we had an RCD chip that was a leading chip in the DDR5 world. And that's why we transitioned from about 20-plus percent share in DDR4 to 40% share in DDR5. So it was the #1 priority. It was absolutely necessary for us to not miss that transition in the market. The next most important chip on that module in the companion chip family is the power management chip. And the reason for that is if you look at the memory module, it's very, very dense. It's in a very challenging environment in terms of thermal environment, and it's very prudent to noise. So it's very important to distribute the power in a very efficient way on to that module. And that's something that is hard to make. If the RCD chip is the hardest strip to make, the next harvest stub to make is the power management chip. So we started to develop this as a capability internally by investing in the team about 2 years ago. We worked 2 years and we have announced our chipset a couple of months ago. And we have announced our chipset at a time where we knew we had traction with our memory customers. So the customers that buy the RCD chip from us have given us very strong feedback about our power management chips. So our differentiator there, although we come late is that we understand the ecosystem, the qualification of those chips is exactly the same process as the RCD chip. We understand the technical environment very well. The constraints on the module very, very well. So that's another advantage we have. We can also make sure that interoperability between those chips well because we have both. And the way we introduce our chip if you read our press release, is that we went for the high end, the most difficult chip to make to convince our customers that we were a reliable partner there, and that's also a good sign for us to enter that market. So we are entering the high end for modules. Then that will percolate down into the other modules. And in the longer run, these type of technologies can be used also in client systems. So we're quite confident with the traction we had there.

Got it. Now that you have all these 3 companion chips, you're also ramping to DDR5 RCD, how should we think about the mix and contribution to your product business going forward?

So as we said earlier, our position today in the DDR5 RCD chips to be around 40% market share, and we expect to continue to grow there. Our goal for the companion chips to get 20% share of that market. The different players we came late. We're not going to step to 20% with one go. We're going to go through the qualification process. But in the long run, our goal is to get 20% share of that companion chip market. And this companion chip will start to contribute this year in the second half, and that explains some of the growth that we see in the second half of this year. But this is going to be through ramping with our customers.

Got it. I think this could be a high-level question but we're seeing a lot of memory architectures move towards the traditional -- from traditional towards accelerated. We're seeing more of these HBM memory though less of the DDR perhaps, how would someone like Rambus kind of position yourself in that dynamic? And what are your strategies?

Well, we see this as an exciting time. You know that people are interested in memory. Memory was not exciting for many, many years, and that's probably one of the most exciting areas. Earlier, I talked about our patent licensing program. Everyone building HBM, GDDR, LPDDR, DDR, all types of memories are licensees to us. So we have a deep knowledge of these type of memories. Now when it comes to products, let me start with Silicon IP. When you start with Silicon IP, we have developed IP controllers in those fields. So we have GDDR controllers, HBM controllers, PCI controllers, CXL controllers. We also have security solutions and we sell those controllers to people who build chip for AI. So we have a pretty good view of the traction we're having there that explains the growth we've seen in the Silicon IP business. We sold a lot of these interfaces to people building chips for the AI space. So that's a growth factor for us. Now when we look at the product side, people oppose HBM to DDR. We don't oppose this too much. I think what has happened last year is that it was a CapEx situation where the fixed CapEx people had to invest into the AI servers. But this being said, we continue to see growth in standard servers. So that's a vector for us. We are going to see a refresh of standard servers, starting in the second half of this year, like the rest of the industry. So that's going to be a growth factor. But if you look at AI servers and the architecture of AI servers, they use both GPUs and HBM memory for the number crunching. But in that same server, you also have standard servers like standard x86 servers with standard build memories. And the reason you have this is because when you have this HBM and GPU banks in an AI server, you have to feed those with data that has been preprocessed. And that preprocessing, that cleaning of data is being done by standard servers, and these standard servers use standard needs. And typically, they use high-density dims. So this has been a tailwind for us. And so that's why we don't oppose this and every time you see HBM and GPUs in that same box, you also see standard servers that people don't talk too much about with very high density in memory. If you think about it in the latest servers, AI servers from NVIDIA, you can have up to 4 terabyte of the memory attached to these x86 processors. So this has been a tailwind for the technology standpoint.

Then would you say the AI servers just because they have the GP was on top of the traditional servers, they offer incremental content for you?

Yes. They were for incremental contents. I would say, I also see them as it's been a catalyst for the adoption of DDR5 because these servers in an AI box, they need so much power, so much bandwidth, so much capacity that the DDR4 platforms could not provide that. So that was a kind of catalyst for DDR5 adoption. And yes they're [indiscernible] yes.

Sounds good on this but could you talk about the rising client opportunities with the memory interface solutions.

Sure. One of the challenges in data centers, the reason we have a buffer chip in particular, is to reconstruct signals. In a data center, you have a lot of signals, traveling on parallel lines in a very noisy environment. And the role of the buffer chip, which is our traditional business is to reconstruct those signals to make sure that you have clean signals in and out of the processor to the memory. On the client space, you also have memory modules but the speeds were not as high as they were on the data center. But what you do see now is and you look at the road map of the processor guys when they go to the client space is that the speeds are going higher and higher. And there's a moment where the same type of functionality is going to be required. Our view is that when the speed on the bus goes up to 6,400 mega-transfers per second, then a similar function to what we have in the data center for the RCD is going to be required on the client space. And these are solutions we're working on. Similarly, when the performance of these client solutions are going to continue to go up, we will have to think about power management solutions that address those higher requirements. So we see the client space as an expansion of TAM for us with a slight delay to the data center because the speeds are going to come later, they come at the data center.

Got it. On to the [ more fine ] business, in my opinion, the silicon IP, could you briefly give us some strategy overview of your Silicon IP business, what your drivers are? How you're expecting to grow over the next couple of quarters in the long term?

Sure. So in the Silicon IP business, we offer basically 3 types of IP. One is high-speed memory controllers, the second one is high-speed interconnect controllers, and the third one is security. And the reason we're focusing on those is on the memory controller and I/O controllers and this is what the company has done for a long time, since we were born. And that's something we understand really, really well. And that's something that adds value to the ecosystem we are playing in. So we were the first one to have an HBM3 controller. We're the first one to have an HBM3e controller. We're actively working on HBM4. We're the first one to have GDR6 comfort. We are actively working on GDR7. Same goes for PCIe or CXL. So our advantage there is that this is a technology that we understand really, really well in an ecosystem that we understand really, really well. And we differentiate by being at the leading edge of those speeds. We always announce those speeds ahead all of our competitors, and we engage with customers ahead of our competitors. On the security side, we started to invest in security in 2011 through an acquisition. We believe we are the leader as an independent security IP provider. And back in 2011, there was little understanding in the market in general about the importance of security. But today, you were talking about the data center architectures, everything is changing. What's happening is that you have very heterogeneous architectures, a lot of chips, a lot of different chips going into those data centers. And those chips have to hold a lot of data and they have to transmit a lot of data between the different chips. And you want to make sure of is that you protect that data. When that data sits in some place, it cannot be compromised or when the data moves in one place to the other place, it cannot be compromised as well. So security is becoming a critical component in all of those chips and this has been a driver for us of growth. So the combination of high-speed memory critical to AI, high-speed interface, I/O interface, critical to AI, critical to automotive, critical to all the markets, and security have been growth drivers for us. So our focus on those technology -- technologies has allowed us to grow in that. This is a market, as we said earlier but it's about -- a business that is about $100 million for us and that we expect to grow 10% to 15% a year.

More on interface IP. You briefly mentioned the HBM3 controller, how should we think about Rambus' opportunities and content changing as we go from 3 to 3e, 3 to 4 because the industry is moving really fast.

The industry is moving really fast. You're right. You invest a nice thing about the memory industry. The processing capabilities can be very, very fast. And it's been always the case that memory is a bit lagging behind from a technology standpoint. We call it the memory wall. So we always have to think about new architectures to evolve the memory to catch up with the speed of development on the compute side. So -- it's also true for HBM based architectures. The GPUs become more and more powerful. They today use HBM3 memory but there's a limitation to what HBM3 can offer. So people are thinking about HBM4. HBM4 widens the bus and allows these GPUs to have access to more data faster. And as we do traditionally, especially with bleeding-edge technologies is we are developing HBM4 technologies internally, and we are engaging with a few leading customers there. And this is very advanced technologies, and we're working with the leaders in that market. But that's something that there's a natural extension to what we've done. We've been the first in 3, the first in 3, and we are working on 4 now.

Just one follow-up there. NVIDIA announced the Rubin platform, which is supposed to launch in 2026. I suppose to latter half of that, but that is utilizing HBM4. So for Rambus, when should we start expecting revenue from HBM4 to really maturely thinking?

Without going into customer details, I'll say that again, first of all, everyone developing their own HBM4, needs to have a license from us. That's the first thing I would say. And then we are engaged with leading customers in the market on HBM4 solutions. But because they are leading customers in the market, I cannot be more specific than that. But we should see, as part of our portfolio, some revenue from the HBM family continued to grow as we move into next year.

Got it. One on CSL. I think you briefly mentioned this well but I think a lot of the CXL is excitement had slowed down a little bit last year and this year. Could you update us on your CXL opportunity where the ecosystem is today?

Sure. So the 2 ways we're approaching the CXL market. The first one is through our Silicon IP offering. So CXL is a standard of communication between chips, basically, this is what it is. When you have heterogeneous architectures and a lot of chips, you have to make sure that they speak the same language. So they have to agree on an interface. And that interface, the industry has converged onto the CXL interface and the CXL protocol. So we do have a fair amount of sales of CXL IP to anyone building chip with a CXL interface. And that's been a factor of growth for our Silicon IP business. The flip side of that is that everyone developing their own chip. From a chip standpoint, this is very fragmented. So there are a lot of CXL interfaces. But the market for CXL chips is very fragmented in this first generation of CXL solutions. The other way we go to CXL is we have developed our own chip. We are addressing the question of memory expansion. And that chip is being used today by our customers for proof of concept but also to try use cases because the question the industry is asking is, is there a way to add memory through a serial bus and a CXL interface? But the industry has not converged on a standard chip solution and if not resolved all the questions of latency and these kind of things. So we have chips out there that people are using to do some testing work. But we believe that the industry will not converge on a standard chip until at least CXL 3.0 is available in the market. So this is something that's going to happen not before '26, '27 on the chip side. As I said, this excitement -- as you said, there's excitement on the CXL but the market today is fragmented from a chip standpoint, [indiscernible] from a Silicon IP standpoint but from a chip standpoint, it is fragmented. We hope the industry is going to converge on the standard chips down the road.

Got it. I wanted to be some very important questions for Des. Gross margin outlook, 61% were products in the first quarter. I think you've guided to be in the long-term range of 60% to 65% for the full year. I mean we're kind of there, aren't we? We're also going to see more DDR5 mix come in throughout the year. So how should we think about the gross margin exiting the year?

Yes. We've been very pleased with the performance on the chip gross margin. As you mentioned, our long-term target is 60% to 65%. And we really manage our gross margins for the longer term. If you look at 2023, it was 63%. 2022, it was 61%. So we're within that long-term margin sort of target. And we've done that by being disciplined in our approach to pricing as well as driving cost reductions going forward. You're right. We manage our gross margins for the long term. Any given quarter, we could see some movements on the sort of gross margin depending upon what products are shipping out. But in the long term, I think we feel very comfortable with the sort of 60% to 65%, and that's where we've been operating so far this year.

Do you think the addition of the PMICs would have an impact on margins as well?

I think on the chip side, we'll be able to manage the addition of the companion chips within the long-term targeted model of 60% to 65%, and that's the right way to think about the chip gross margin going forward.

Got it. And then more about your capital allocation strategy. I mean, you're generating cash pretty strongly. So I would have to wonder what the strategy is?

Yes. We're very fortunate to have a robust balance sheet, which is debt free, and we continue to generate a lot of cash. I would say that our capital allocation strategy is really built around 3 pillars: Organic investment, inorganic investment, and return to shareholders from a capital perspective. Organically, we'll continue to invest in the high-growth opportunities ahead of us. We talked about some of those today, the companion chips, the power investments, the client opportunities, and it's important we continue to invest in the right level going forward to continue to drive the growth of the company. Inorganically, we have been acquisitive. We've made 5 acquisitions in the last 4 years, which has really got our Silicon IP business to scale, and that's something we'll continue to look at. But we'll continue to be disciplined in our approach here to make sure strategically, operationally and financially, this would make sense to us. And lastly, on the capital return, we have a great track record here. Our target is to return 40% to 50% of free cash flow back to shareholders but in the last sort of 3 years, we've returned the $350 million, which equates to about 60% of free cash flow. I think going forward, that is the sort of playbook that we would expect to see from us from capital allocation.

Sounds good. We could go on forever but got out of time. So thank you so much, Luc, and Des.

Thank you.

Thank you.